Hi Simon,
while working with the FDT in the SPL, I came across an alignment issue. I have seen 64-bits integers not aligned on a 64-bit boundary, although is doesn't happen very often. According to the FDT spec, the requirement is to be aligned on 32-bits, so it is OK.
However on ARM64, until the cache is enabled, it is not possible to access 64-bits integers not aligned on a 64-bits boundary. This issue has been discussed here : http://u-boot.10912.n7.nabble.com/memcpy-memset-on-arm64-platforms-td353928....
I have a patch for this but I am not sure, this is the right approach:
diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h index e2bf79c7ee..b6b7176a8a 100644 --- a/include/linux/libfdt_env.h +++ b/include/linux/libfdt_env.h @@ -15,7 +15,7 @@
typedef __be16 fdt16_t; typedef __be32 fdt32_t; -typedef __be64 fdt64_t; +typedef __be64 fdt64_t __aligned(4);
The trouble with this patch is that for every fdt64_t the access will be aligned on 32-bits, inducing an overall performance penalty.
The other approach will be to fix the problem where it happens. So far I had the issue only ofnode_read_u64() because that is what the driver I worked with is using.
What do you think?
Thanks,
JJ