Introduce the basic files needed to support the TI J722S family of SoCs.
Co-developed-by: Vaishnav Achath vaishnav.a@ti.com Signed-off-by: Vaishnav Achath vaishnav.a@ti.com Signed-off-by: Jayesh Choudhary j-choudhary@ti.com --- board/ti/j722s/Kconfig | 26 + board/ti/j722s/MAINTAINERS | 9 + board/ti/j722s/Makefile | 7 + board/ti/j722s/board-cfg.yaml | 36 + board/ti/j722s/evm.c | 29 + board/ti/j722s/j722s.env | 15 + board/ti/j722s/pm-cfg.yaml | 12 + board/ti/j722s/rm-cfg.yaml | 1119 +++++++++++++++++++++++++++++++ board/ti/j722s/sec-cfg.yaml | 379 +++++++++++ board/ti/j722s/tifs-rm-cfg.yaml | 981 +++++++++++++++++++++++++++ 10 files changed, 2613 insertions(+) create mode 100644 board/ti/j722s/Kconfig create mode 100644 board/ti/j722s/MAINTAINERS create mode 100644 board/ti/j722s/Makefile create mode 100644 board/ti/j722s/board-cfg.yaml create mode 100644 board/ti/j722s/evm.c create mode 100644 board/ti/j722s/j722s.env create mode 100644 board/ti/j722s/pm-cfg.yaml create mode 100644 board/ti/j722s/rm-cfg.yaml create mode 100644 board/ti/j722s/sec-cfg.yaml create mode 100644 board/ti/j722s/tifs-rm-cfg.yaml
diff --git a/board/ti/j722s/Kconfig b/board/ti/j722s/Kconfig new file mode 100644 index 0000000000..68c214e473 --- /dev/null +++ b/board/ti/j722s/Kconfig @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# + +if TARGET_J722S_R5_EVM || TARGET_J722S_A53_EVM + +config SYS_BOARD + default "j722s" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j722s_evm" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_J722S_R5_EVM + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +endif diff --git a/board/ti/j722s/MAINTAINERS b/board/ti/j722s/MAINTAINERS new file mode 100644 index 0000000000..7908c30def --- /dev/null +++ b/board/ti/j722s/MAINTAINERS @@ -0,0 +1,9 @@ +J722S BOARD +M: Vaishnav Achath vaishnav.a@ti.com +M: Jayesh Choudhary j-choudhary@ti.com +M: Tom Rini trini@konsulko.com +S: Maintained +F: board/ti/j722s/ +F: include/configs/j722s_evm.h +F: configs/j722s_evm_r5_defconfig +F: configs/j722s_evm_a53_defconfig diff --git a/board/ti/j722s/Makefile b/board/ti/j722s/Makefile new file mode 100644 index 0000000000..20d2ec934b --- /dev/null +++ b/board/ti/j722s/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evm.o diff --git a/board/ti/j722s/board-cfg.yaml b/board/ti/j722s/board-cfg.yaml new file mode 100644 index 0000000000..f9a4c438ca --- /dev/null +++ b/board/ti/j722s/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J722S +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable: 0x5A + main_isolation_hostid: 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor: 0x1 + scaling_profile: 0x1 + disable_main_nav_secure_proxy: 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size: 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables: 0x00 + trace_src_enables: 0x00 diff --git a/board/ti/j722s/evm.c b/board/ti/j722s/evm.c new file mode 100644 index 0000000000..515aaa8187 --- /dev/null +++ b/board/ti/j722s/evm.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board specific initialization for J722S platforms + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + * + */ + +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include <dm/uclass.h> +#include <env.h> +#include <fdt_support.h> +#include <spl.h> + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} diff --git a/board/ti/j722s/j722s.env b/board/ti/j722s/j722s.env new file mode 100644 index 0000000000..f8b6aff2c2 --- /dev/null +++ b/board/ti/j722s/j722s.env @@ -0,0 +1,15 @@ +#include <env/ti/ti_common.env> +#include <env/ti/mmc.env> + +name_kern=Image +console=ttyS2,115200n8 +args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 + ${mtdparts} +run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} + +boot_targets=mmc1 mmc0 pxe dhcp +boot=mmc +mmcdev=1 +bootpart=1:2 +bootdir=/boot +rd_spec=- diff --git a/board/ti/j722s/pm-cfg.yaml b/board/ti/j722s/pm-cfg.yaml new file mode 100644 index 0000000000..46b3ad2010 --- /dev/null +++ b/board/ti/j722s/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J722S +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 diff --git a/board/ti/j722s/rm-cfg.yaml b/board/ti/j722s/rm-cfg.yaml new file mode 100644 index 0000000000..21ca30104c --- /dev/null +++ b/board/ti/j722s/rm-cfg.yaml @@ -0,0 +1,1119 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J722S +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 20 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 22 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - 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+ processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id: 0 + otp_entry: + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci: 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size: 0 + auth_resource_owner: 0 + enable_saul_psil_global_config_writes: 0x5A + rsvd: [0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock: 0x5A + allow_wildcard_unlock: 0x5A + allowed_debug_level_rsvd: 0 + rsvd: 0 + min_cert_rev: 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender: 0 + handover_to_host_id: 0 + rsvd: [0, 0, 0, 0] diff --git a/board/ti/j722s/tifs-rm-cfg.yaml b/board/ti/j722s/tifs-rm-cfg.yaml new file mode 100644 index 0000000000..5e8d7e0444 --- /dev/null +++ b/board/ti/j722s/tifs-rm-cfg.yaml @@ -0,0 +1,981 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J722S +# + +--- + +tifs-rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - #1 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #2 + host_id: 20 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #3 + host_id: 22 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #4 + host_id: 30 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #5 + host_id: 36 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #6 + host_id: 38 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #7 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #8 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #9 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #10 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #11 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #12 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #13 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #14 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #17 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #18 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #19 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #20 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #21 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #22 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #23 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #24 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #25 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #26 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #27 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #28 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #29 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #30 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #31 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #32 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + resasg: + subhdr: + magic: 0x7B25 + size: 8 + resasg_entries_size: 976 + reserved: 0 + resasg_entries: + - + start_resource: 0 + num_resource: 16 + type: 1677 + host_id: 12 + reserved: 0 + - + start_resource: 16 + num_resource: 6 + type: 1677 + host_id: 20 + reserved: 0 + - + start_resource: 16 + num_resource: 6 + type: 1677 + host_id: 36 + reserved: 0 + - + start_resource: 22 + num_resource: 2 + type: 1677 + host_id: 30 + reserved: 0 + - + start_resource: 24 + num_resource: 4 + type: 1677 + host_id: 22 + reserved: 0 + - + start_resource: 28 + num_resource: 4 + type: 1677 + host_id: 38 + reserved: 0 + - + start_resource: 57 + num_resource: 16 + type: 1678 + host_id: 12 + reserved: 0 + - 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