26 Mar
2013
26 Mar
'13
3:52 p.m.
On Fri, Mar 08, 2013 at 07:40:58AM -0000, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
The original write to sdram_config is correct for DDR3 but incorrect for DDR2 so SPL was hanging. For DDR2, the write to sdram_config should be after the writes to ref_ctrl. This was working for DDR3 because there was a write of 0x2800 to ref_ctrl before a write to sdram_config.
Tested on: GP EVM 1.1A (DDR2), GP EVM 1.5A (DDR3), Beaglebone A6 (DDR2), Beagleone Blacd A4A (DDR3)
Signed-off-by: Steve Kipisz s-kipisz2@ti.com
Applied to u-boot-ti/master (and already pulled into u-boot-arm), thanks!
-- Tom