Re: [U-Boot] [PATCH 1/2] drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl

31 May 2016


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-----Original Message-----
From: York Sun [mailto:york.sun@nxp.com]
Sent: Tuesday, May 17, 2016 12:55 AM
To: Shengzhou Liu shengzhou.liu@nxp.com; u-boot@lists.denx.de
Subject: Re: [PATCH 1/2] drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl
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Shengzhou,
Your understanding is correct. However, we have done analysis that the
additional bit is not used for finer adjustment. So unless you have a case
requiring values in the middle, I suggest to keep current code.
York
York
On LS1046RDB, the clk_adj is 9, an odd instead of even data, so we have to update it, and there will be more new boards in future with possibly odd clk_adj.
Shengzhou