
On Tue, Jul 21, 2015 at 1:15 AM, Peng Fan Peng.Fan@freescale.com wrote:
Check maximum ecc strength for each platfrom to avoid the calculated ecc exceed the limitation.
Signed-off-by: Peng Fan Peng.Fan@freescale.com Signed-off-by: Han Xu b45815@freescale.com Reviewed-by: Marek Vasut marex@denx.de
Changes v2: Add Marek's reviewed by.
drivers/mtd/nand/mxs_nand.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 33ce817..97011b2 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -149,6 +149,13 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size, uint32_t page_oob_size) { int ecc_strength;
int max_ecc_strength_supported;
/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
if (is_cpu_type(MXC_CPU_MX6SX))
max_ecc_strength_supported = 62;
else
max_ecc_strength_supported = 40; /* * Determine the ECC layout with the formula:
@@ -162,7 +169,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size, / (galois_field * mxs_nand_ecc_chunk_cnt(page_data_size));
return round_down(ecc_strength, 2);
return min(round_down(ecc_strength, 2), max_ecc_strength_supported);
}
static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
1.8.4
Tested on IMX6 with MT29F16G08 16Gb and MT29F2G08 2Gb NAND devices.
Tested-By: Tim Harvey tharvey@gateworks.com