Bruce,
I think you've hit upon something here. After checking the SPD tables during the intial comparison for data rates, it is clear that 1) the DDR2 bit fields are not defined properly. i.e. it looks like the big if-if-else statement specifically does not have valid DDR2 values defined for clk_cycle2 (30h, 3Dh, 50h) not DDR1, so we're going need an extra 3 defined at a minimum.
I haven't gone through the rest yet, but most likely if we want to keep SPD working for DDR2, we'll have to add the DDR2 definitions SPD into the code, as it looks like the DDR2 port is only partially complete.
-Russ
-----Original Message----- From: Bruce_Leonard@selinc.com [mailto:Bruce_Leonard@selinc.com] Sent: Tuesday, June 03, 2008 3:31 PM To: rmcguire@videopresence.com Cc: 'Maggs Bill'; 'Steve Hensley'; u-boot-users@lists.sourceforge.net; u-boot-users-bounces@lists.sourceforge.net Subject: Re: [U-Boot-Users] 83xx SPD_EEPROM DDR2 Issues
Today, I went to my local PC store, and bought EVERY type of DDR2 SODIMM memory they had, Kingston, Crucial, PC4200, PC5300 four different kinds of memory, and NONE of them will boot with U-boot now.
Hay Russell,
I don't have patches, and I haven't worked on this in a long time because we have a single build option for our RAM. However, I may have a pointer for you to look at if you haven't already. Way back when we we're thinking about having SPD support I did spend some time digging through spd_sdram.c and found that some of the calculations were....I won't say broken, but not exactly acurate because of they way they were done. I also found that the highest data rate speeds supported didn't go high enough to support all of the speeds DDR2 can have. Like I said, it's been a long time and someone may have already fixed it, but it had to do with calculating max_data_rate, effective_data_rate, and caslat in spd_sdram(). It was something I ment to fix and then never did because we didn't end up using it. Hope this helps. If not, sorry for the noise.
Bruce