Hi all, I am trying to activate a PCIe link between two MPC8544 processor's on a custom board. One processor is configured as Root Complex (cfg_host_agt[0:2] = '111') and the other processor as endpoint (cfg_host_agt[0:2] = '101'). Only PCIe1 is active in both processors (cfg_IO_ports[0:2] = '010')
In u-boot I set the following flags in both processors:
#define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ //MJ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
In the first processor (configured as RC) I get the following output:
* pci_init_board: devdisr=7000008, io_sel=2, host_agent=7
PCIE1 connected to Slot2 as Root Complex (base address e000a000) ....PCIE link error. Skipping scan.LTSSM=0x00 PCIE1 on bus 00 - 00*
In the second processor (configured as EP) I get the following output:
* pci_init_board: devdisr=7000008, io_sel=2, host_agent=5
** PCIE1 connected to Slot2 as End Point (base address e000a000) Scanning PCI bus 00 PCI Scan: Found Bus 0, Device 1, Function 0 00 01 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 2, Function 0 00 02 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 3, Function 0 00 03 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 4, Function 0 00 04 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 5, Function 0 00 05 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 6, Function 0 00 06 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 7, Function 0 00 07 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 8, Function 0 00 08 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 9, Function 0 00 09 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 10, Function 0 00 0a 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 11, Function 0 00 0b 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 12, Function 0 00 0c 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 13, Function 0 00 0d 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 14, Function 0 00 0e 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 15, Function 0 00 0f 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 16, Function 0 00 10 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 17, Function 0 00 11 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 18, Function 0 00 12 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 19, Function 0 00 13 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 20, Function 0 00 14 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 21, Function 0 00 15 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 22, Function 0 00 16 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 23, Function 0 00 17 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 24, Function 0 00 18 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 25, Function 0 00 19 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 26, Function 0 00 1a 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 27, Function 0 00 1b 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 28, Function 0 00 1c 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 29, Function 0 00 1d 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 30, Function 0 00 1e 1957 0033 0b20 00 PCI Scan: Found Bus 0, Device 31, Function 0 00 1f 1957 0033 0b20 00 PCIE1 on bus 00 - 00*
Each processor is detecting it's own PCIe interface but it is not detecting the other interface on the bus.
From the output of the RC processor:
....PCIE link error. Skipping scan.LTSSM=0x00
from table Table 18-109, the controller doesn't detect any activity on the bus.
I proceed trying to check in the HW for any activity in the PCIe bus. I don't see any activity in the bus from any of the processors. Both controller are getting the clock, and apart the PCIe detection both processor are working an proceed the booting stage.
Is there any configuration missing in u-boot for the PCIe configuration?
Does anyone has any clue/hint to aid in the debugging process of the PCIe interface either for the SW and HW side?
Thanks in advance,
Antonio