If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory mapped access will be used to read/write the uart registers.
This is especially useful for SoC devices that implement 16550 compatible uarts but that have peripheral access width constraints.
Signed-off-by: Dave Aldridge fovsoft@gmail.com --- Changes for v2: - Add endian support
drivers/serial/ns16550.c | 6 ++++++ include/ns16550.h | 2 ++ 2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 8eeb48f..e16685b 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -19,6 +19,12 @@ #ifdef CONFIG_SYS_NS16550_PORT_MAPPED #define serial_out(x,y) outb(x,(ulong)y) #define serial_in(y) inb((ulong)y) +#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) +#define serial_out(x,y) writel(cpu_to_be32(x),y) +#define serial_in(y) cpu_to_be32(readl(y)) +#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) +#define serial_out(x,y) writel(cpu_to_le32(x),y) +#define serial_in(y) cpu_to_le32(readl(y)) #else #define serial_out(x,y) writeb(x,y) #define serial_in(y) readb(y) diff --git a/include/ns16550.h b/include/ns16550.h index 9ea81e9..d4ffac9 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -23,6 +23,8 @@
#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error "Please define NS16550 registers size." +#elif defined(CONFIG_SYS_NS16550_MEM32) +#define UART_REG(x) unsigned int x; #elif (CONFIG_SYS_NS16550_REG_SIZE > 0) #define UART_REG(x) \ unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \