From: Algapally Santosh Sagar santoshsagar.algapally@amd.com
Add missing prototypes to fix the below sparse warnings 1. warning: no previous prototype for 'set_r5_halt_mode' [-Wmissing-prototypes] 2. warning: no previous prototype for 'set_r5_tcm_mode' [-Wmissing-prototypes] 3. warning: no previous prototype for 'release_r5_reset' [-Wmissing-prototypes] 4.warning: no previous prototype for 'enable_clock_r5' [-Wmissing-prototypes]
Signed-off-by: Algapally Santosh Sagar santoshsagar.algapally@amd.com Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
arch/arm/mach-versal/mp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c index 9b0518d6a2..5b850f3f89 100644 --- a/arch/arm/mach-versal/mp.c +++ b/arch/arm/mach-versal/mp.c @@ -23,7 +23,7 @@ #define VERSAL_CRL_RST_CPU_R5_RESET_PGE_MASK 0x10 #define VERSAL_CRLAPB_CPU_R5_CTRL_CLKACT_MASK 0x1000000
-void set_r5_halt_mode(u8 halt, u8 mode) +static void set_r5_halt_mode(u8 halt, u8 mode) { u32 tmp;
@@ -44,7 +44,7 @@ void set_r5_halt_mode(u8 halt, u8 mode) } }
-void set_r5_tcm_mode(u8 mode) +static void set_r5_tcm_mode(u8 mode) { u32 tmp;
@@ -62,7 +62,7 @@ void set_r5_tcm_mode(u8 mode) writel(tmp, &rpu_base->rpu_glbl_ctrl); }
-void release_r5_reset(u8 mode) +static void release_r5_reset(u8 mode) { u32 tmp;
@@ -77,7 +77,7 @@ void release_r5_reset(u8 mode) writel(tmp, &crlapb_base->rst_cpu_r5); }
-void enable_clock_r5(void) +static void enable_clock_r5(void) { u32 tmp;