Hi,
this patch adds support for Micrel's switches KS8893 and KS8993 and for Micrel's PHYs KS8721 and KS8001. The drivers can be used with AT91RM9200 based boards.
Using these drivers requires to apply the CONFIG_PHY_ADDR patch that was send to the list on 11.08.06.
Best Regards Mirco
Signed-off-by: Mirco Fuchs mircofuchs@web.de
CHANGELOG: - Add support for Micrel's switches (KS8893 and KS8993) und Micrel's PHYs (KS8721, KS8001) for AT91RM9200 based boards.
diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile index 8d4e478..7d50c22 100644 --- a/cpu/arm920t/at91rm9200/Makefile +++ b/cpu/arm920t/at91rm9200/Makefile @@ -25,8 +25,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = bcm5221.o dm9161.o ether.o i2c.o interrupts.o \ - lxt972.o serial.o usb_ohci.o +COBJS = bcm5221.o dm9161.o ether.o i2c.o interrupts.o ks8893.o \ + ks8993.o ks8xx1.o lxt972.o serial.o usb_ohci.o SOBJS = lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/arm920t/at91rm9200/ks8893.c b/cpu/arm920t/at91rm9200/ks8893.c new file mode 100644 index 0000000..d79d064 --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8893.c @@ -0,0 +1,272 @@ +/* + * Driver for Micrel's KS8893 ethernet switch. The configuration of the switch + * uses the Serial Management Interface (SMI), modification of the + * MII-Management Interface. + * + * (C) Copyright 2006 + * Authors : + * Udo Jakobza (jakobza@ftz-leipzig.de) + * Mirco Fuchs (fuchs@ftz-leipzig.de) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91rm9200_net.h> +#include <net.h> +#include <ks8893.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +/* + * Name: + * ks8893_SmiReadPhy + * Description:ETHER_MD_CA_ADDR_MSK + * Reads data from the PHY register + * Arguments: + * dev - pointer to struct net_device + * RegisterAddress - unsigned char + * pInput - pointer to value read from register + * Return value: + * TRUE - if data read successfully + */ +UCHAR ks8893_SmiReadPhy (AT91PS_EMAC p_mac, + unsigned char regadd, + unsigned short *pInput) +{ + p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) | + (!AT91C_EMAC_RW) | + (((((regadd >> 5) & 0x7) | 0x10) << 23) & AT91C_EMAC_PHYA) | + ((regadd << 18) & AT91C_EMAC_REGA) | + (AT91C_EMAC_CODE_802_3) | + 0xFFFF; + udelay (10000); + *pInput = (unsigned short) p_mac->EMAC_MAN; + return TRUE; +} + + +/* + * Name: + * ks8893_SmiWritePhy + * Description: + * Writes data to the PHY register + * Arguments: + * dev - pointer to struct net_device + * RegisterAddress - unsigned char + * pOutput - pointer to value to be written in the register + * Return value: + * TRUE - if data read successfully + */ +UCHAR ks8893_SmiWritePhy (AT91PS_EMAC p_mac, + unsigned char regadd, + unsigned short *pOutput) +{ + p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) | + (!AT91C_EMAC_RW) | + ((((regadd >> 5) & 0x7) << 23) & AT91C_EMAC_PHYA) | + ((regadd << 18) & AT91C_EMAC_REGA) | + (AT91C_EMAC_CODE_802_3) | + *pOutput; + udelay (10000); + return TRUE; +} + +/* + * Name: + * ks8893_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers and calculates the OUI + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +unsigned int ks8893_IsPhyConnected (AT91PS_EMAC p_mac) +{ + unsigned short id; + + at91rm9200_EmacEnableMDIO (p_mac); + ks8893_SmiReadPhy (p_mac, KS8893_CPID0_REG, &id); + at91rm9200_EmacDisableMDIO (p_mac); + + if (id == KS8893_CHIPID0) { + return TRUE; + } + return FALSE; +} + +/* + * Name: + * ks8893_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked for both switch + * ports + * Arguments: + * p_mac - pointer to MAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8893_GetLinkSpeed (AT91PS_EMAC p_mac) +{ + unsigned short p1stat0 = 0x00aa; + unsigned short p1stat1 = 0x00aa; + unsigned short p2stat0 = 0x00aa; + unsigned short p2stat1 = 0x00aa; + unsigned short tmp; + + /* check if there is a link on port 1 or port 2*/ + if (!ks8893_SmiReadPhy (p_mac, KS8893_PORT1_STAT0_REG, &p1stat0)) { + return FALSE; + } + + if (!ks8893_SmiReadPhy (p_mac, KS8893_PORT2_STAT0_REG, &p2stat0)) { + return FALSE; + } + + debug ("Port1: STAT0 is 0x%x\n", p1stat0); + debug ("Port2: STAT0 is 0x%x\n", p2stat0); + + /* if there is no link on both ports */ + if (!(p1stat0 & KS8893_LNK_UP) && !(p2stat0 & KS8893_LNK_UP)) { + printf ("No Link on Port 1 and Port 2\n"); + return FALSE; + } + + /* check operation speed on both ports */ + if (!ks8893_SmiReadPhy (p_mac, KS8893_PORT1_STAT1_REG, &p1stat1)) { + return FALSE; + } + + if (!ks8893_SmiReadPhy (p_mac, KS8893_PORT2_STAT1_REG, &p2stat1)) { + return FALSE; + } + + if ((p1stat0 & KS8893_LNK_UP)) { + if ((p1stat1 & KS8893_LNK_SPEED) && + (p1stat1 & KS8893_LNK_DUPLEX)) { + debug ("KS8893 Port 1: 100 MBit, Full Duplex\n"); + } else if ((p1stat1 & KS8893_LNK_SPEED) && + !(p1stat1 & KS8893_LNK_DUPLEX)) { + debug ("KS8893 Port 1: 100 MBit, Half Duplex\n"); + } else if (!(p1stat1 & KS8893_LNK_SPEED) && + (p1stat1 & KS8893_LNK_DUPLEX)) { + debug ("KS8893 Port 1: 10 MBit, Full Duplex\n"); + } else { + debug ("KS8893 Port 1: 10 MBit, Half Duplex\n"); + } + } else { + debug ("KS8893 Port 1: No Link\n"); + } + + if ((p2stat0 & KS8893_LNK_UP)) { + if ((p2stat1 & KS8893_LNK_SPEED) && + (p2stat1 & KS8893_LNK_DUPLEX)) { + debug ("KS8893 Port 2: 100 MBit, Full Duplex\n"); + } else if ((p2stat1 & KS8893_LNK_SPEED) && + !(p2stat1 & KS8893_LNK_DUPLEX)) { + debug ("KS8893 Port 2: 100 MBit, Half Duplex\n"); + } else if (!(p2stat1 & KS8893_LNK_SPEED) && + (p2stat1 & KS8893_LNK_DUPLEX)) { + debug ("KS8893 Port 2: 10 MBit, Full Duplex\n"); + } else { + debug ("KS8893 Port 2: 10 MBit, Half Duplex\n"); + } + } else { + debug ("KS8893 Port 2: No Link\n"); + } + + /* check the speed of the mii-interface to the switch (3-port) + * Speed on port 3 only depends on power up settings, not on link + * partner + */ + if (!ks8893_SmiReadPhy (p_mac, KS8893_GLB_CTL4_REG, &tmp)) { + return FALSE; + } + + if (!(tmp & KS8893_MII_10BT) && !(tmp & KS8893_MII_HD)) { + /*set Emac for 100BaseTX and Full Duplex */ + debug ("Port 3: 100 MBit, Full Duplex\n"); + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + if (!(tmp & KS8893_MII_10BT) && (tmp & KS8893_MII_HD)) { + /* set MII for 100BaseTX and Half Duplex */ + debug ("Port 3: 100 MBit, Half Duplex\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ~(AT91C_EMAC_SPD | + AT91C_EMAC_FD)) | AT91C_EMAC_SPD; + return TRUE; + } + if ((tmp & KS8893_MII_10BT) && !(tmp & KS8893_MII_HD)) { + /* set MII for 10BaseT and Full Duplex */ + debug ("Port 3: 10 MBit, Full Duplex\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ~(AT91C_EMAC_SPD | + AT91C_EMAC_FD)) | AT91C_EMAC_FD; + return TRUE; + } + if ((tmp & KS8893_MII_10BT) && (tmp & KS8893_MII_HD)) { + /* set MII for 10BaseT and Half Duplex */ + debug ("Port 3: 10 MBit, Half Duplex\n"); + p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return TRUE; + } + return FALSE; +} + +/* + * Name: + * ks8893_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8893_InitPhy (AT91PS_EMAC p_mac) +{ + UCHAR ret = TRUE; + unsigned short tmp; + + at91rm9200_EmacEnableMDIO (p_mac); + + if (!ks8893_SmiReadPhy (p_mac, KS8893_CPID1_REG, &tmp)) { + return FALSE; + } + /* turn on switch */ + tmp |= KS8893_START_SW; + if (!ks8893_SmiWritePhy (p_mac, KS8893_CPID1_REG, &tmp)) { + return FALSE; + } + + if (!ks8893_GetLinkSpeed (p_mac)) { + /* Try another time */ + ret = ks8893_GetLinkSpeed (p_mac); + } + at91rm9200_EmacDisableMDIO (p_mac); + return (ret); +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/cpu/arm920t/at91rm9200/ks8993.c b/cpu/arm920t/at91rm9200/ks8993.c new file mode 100644 index 0000000..da10a49 --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8993.c @@ -0,0 +1,281 @@ +/* + * Driver for Micrel's KS8993 ethernet switch. The configuration of the switch + * uses the Serial Management Interface (SMI), modification of the + * MII-Management Interface. + * + * (C) Copyright 2006 + * Authors : + * Udo Jakobza (jakobza@ftz-leipzig.de) + * Mirco Fuchs (fuchs@ftz-leipzig.de) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91rm9200_net.h> +#include <net.h> +#include <ks8993.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +/* + * Name: + * ks8993_GetPhyAddresVal + * Description: + * calculates the value for the pyh address lines to access smi-regs + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +unsigned char ks8993_GetPhyAddressVal (unsigned char smi_reg) +{ + unsigned short reg; + + reg = smi_reg; + + reg = reg >> 2; + reg &= 0x0018; + reg |= 0x0004; + return reg; +} + +/* + * Name: + * ks8993_GetRegAddressVal + * Description: + * + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +unsigned char ks8993_GetRegAddressVal (unsigned char smi_reg) +{ + return (smi_reg & 0x1f); +} + +/* + * Name: + * ks8993_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers and calculates the OUI + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +unsigned int ks8993_IsPhyConnected (AT91PS_EMAC p_mac) +{ + unsigned short id; + + at91rm9200_EmacEnableMDIO (p_mac); + at91rm9200_EmacReadPhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_CPID0_REG), + ks8993_GetRegAddressVal(KS8993_CPID0_REG), + &id); + at91rm9200_EmacDisableMDIO (p_mac); + + if (id == KS8993_CHIPID0) { + return TRUE; + } + return FALSE; +} + +/* + * Name: + * ks8993_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked for both switch + * ports + * Arguments: + * p_mac - pointer to MAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8993_GetLinkSpeed (AT91PS_EMAC p_mac) +{ + unsigned short p1stat0 = 0x00aa; + unsigned short p1stat1 = 0x00aa; + unsigned short p2stat0 = 0x00aa; + unsigned short p2stat1 = 0x00aa; + unsigned short tmp; + + /* check if there is a link on port 1 or port 2*/ + if (!at91rm9200_EmacReadPhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_PORT1_STAT0_REG), + ks8993_GetRegAddressVal(KS8993_PORT1_STAT0_REG), + &p1stat0)) { + return FALSE; + } + + if (!at91rm9200_EmacReadPhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_PORT2_STAT0_REG), + ks8993_GetRegAddressVal(KS8993_PORT2_STAT0_REG), + &p2stat0)) { + return FALSE; + } + + debug ("Port1: STAT0 is 0x%x\n", p1stat0); + debug ("Port2: STAT0 is 0x%x\n", p2stat0); + + /* if there is no link on both ports */ + if (!(p1stat0 & KS8993_LNK_UP) && !(p2stat0 & KS8993_LNK_UP)) { + debug ("No Link on Port 1 and Port 2\n"); + return FALSE; + } + + /* check operation speed on both ports */ + if (!at91rm9200_EmacReadPhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_PORT1_STAT1_REG), + ks8993_GetRegAddressVal(KS8993_PORT1_STAT1_REG), + &p1stat1)) { + return FALSE; + } + + if (!at91rm9200_EmacReadPhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_PORT2_STAT1_REG), + ks8993_GetRegAddressVal(KS8993_PORT2_STAT1_REG), + &p2stat1)) { + return FALSE; + } + + if ((p1stat0 & KS8993_LNK_UP)) { + if ((p1stat1 & KS8993_LNK_SPEED) && + (p1stat1 & KS8993_LNK_DUPLEX)) { + debug ("KS8993 Port 1: 100 MBit, Full Duplex\n"); + } else if ((p1stat1 & KS8993_LNK_SPEED) && + !(p1stat1 & KS8993_LNK_DUPLEX)) { + debug ("KS8993 Port 1: 100 MBit, Half Duplex\n"); + } else if (!(p1stat1 & KS8993_LNK_SPEED) && + (p1stat1 & KS8993_LNK_DUPLEX)) { + debug ("KS8993 Port 1: 10 MBit, Full Duplex\n"); + } else { + debug ("KS8993 Port 1: 10 MBit, Half Duplex\n"); + } + } else { + debug ("KS8993 Port 1: No Link\n"); + } + + if ((p2stat0 & KS8993_LNK_UP)) { + if ((p2stat1 & KS8993_LNK_SPEED) && + (p2stat1 & KS8993_LNK_DUPLEX)) { + debug ("KS8993 Port 2: 100 MBit, Full Duplex\n"); + } else if ((p2stat1 & KS8993_LNK_SPEED) && + !(p2stat1 & KS8993_LNK_DUPLEX)) { + debug ("KS8993 Port 2: 100 MBit, Half Duplex\n"); + } else if (!(p2stat1 & KS8993_LNK_SPEED) && + (p2stat1 & KS8993_LNK_DUPLEX)) { + debug ("KS8993 Port 2: 10 MBit, Full Duplex\n"); + } else { + debug ("KS8993 Port 2: 10 MBit, Half Duplex\n"); + } + } else { + debug ("KS8993 Port 2: No Link\n"); + } + + /* check the speed of the mii-interface to the switch (3-port) + * Speed on port 3 only depends on power up settings, not on link + * partner + */ + if (!at91rm9200_EmacReadPhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_GLB_CTL4_REG), + ks8993_GetRegAddressVal(KS8993_GLB_CTL4_REG), + &tmp)) { + return FALSE; + } + + if (!(tmp & KS8993_MII_10BT) && !(tmp & KS8993_MII_HD)) { + /*set Emac for 100BaseTX and Full Duplex */ + debug ("Port 3: 100 MBit, Full Duplex\n"); + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + if (!(tmp & KS8993_MII_10BT) && (tmp & KS8993_MII_HD)) { + /* set MII for 100BaseTX and Half Duplex */ + debug ("Port 3:100 MBit, Half Duplex\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ~(AT91C_EMAC_SPD | + AT91C_EMAC_FD)) | AT91C_EMAC_SPD; + return TRUE; + } + if ((tmp & KS8993_MII_10BT) && !(tmp & KS8993_MII_HD)) { + /* set MII for 10BaseT and Full Duplex */ + debug ("Port 3:10 MBit, Full Duplex\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ~(AT91C_EMAC_SPD | + AT91C_EMAC_FD)) | AT91C_EMAC_FD; + return TRUE; + } + if ((tmp & KS8993_MII_10BT) && (tmp & KS8993_MII_HD)) { + /* set MII for 10BaseT and Half Duplex */ + debug ("Port 3:10 MBit, Half Duplex\n"); + p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return TRUE; + } + return FALSE; +} + +/* + * Name: + * ks8993_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8993_InitPhy (AT91PS_EMAC p_mac) +{ + UCHAR ret = TRUE; + unsigned short tmp; + + at91rm9200_EmacEnableMDIO (p_mac); + + if (!at91rm9200_EmacReadPhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_CPID1_REG), + ks8993_GetRegAddressVal(KS8993_CPID1_REG), + &tmp)) { + return FALSE; + } + /* turn on switch */ + tmp |= KS8993_START_SW; + if (!at91rm9200_EmacWritePhy (p_mac, + ks8993_GetPhyAddressVal(KS8993_CPID1_REG), + ks8993_GetRegAddressVal(KS8993_CPID1_REG), + &tmp)) { + return FALSE; + } + + if (!ks8993_GetLinkSpeed (p_mac)) { + /* Try another time */ + ret = ks8993_GetLinkSpeed (p_mac); + } + at91rm9200_EmacDisableMDIO (p_mac); + return (ret); +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/cpu/arm920t/at91rm9200/ks8xx1.c b/cpu/arm920t/at91rm9200/ks8xx1.c new file mode 100644 index 0000000..7c8cb51 --- /dev/null +++ b/cpu/arm920t/at91rm9200/ks8xx1.c @@ -0,0 +1,298 @@ +/* + * Driver for Micrel's KS8xx1 ethernet phy interface + * + * (C) Copyright 2006 + * Authors : + * Udo Jakobza (jakobza@ftz-leipzig.de) + * Mirco Fuchs (fuchs@ftz-leipzig.de) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91rm9200_net.h> +#include <net.h> +#include <ks8xx1.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +#ifndef CONFIG_PHY_ADDR +#define CONFIG_PHY_ADDR 0 +#endif + +/* + * Name: + * ks8xx1_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers and calculates the OUI + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +unsigned int ks8xx1_IsPhyConnected (AT91PS_EMAC p_mac) +{ + unsigned short Id1, Id2; + unsigned int oui = 0; + unsigned int tmp_id = 0; + unsigned int mask = 1; + unsigned char i; + + at91rm9200_EmacEnableMDIO (p_mac); + at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_PHYID1, &Id1); + at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_PHYID2, &Id2); + at91rm9200_EmacDisableMDIO (p_mac); + + /* the storage format of micrel's OUI is really strange*/ + tmp_id = Id1 << 6; + tmp_id |= (Id2 >> 10); + + /* reverse bit order*/ + for (i = 24; i > 0; i--) { + oui = oui << 1; + if (tmp_id & mask) { + oui |= 1; + } + mask = mask << 1; + } + + /* arrange the nibbles to get OUI*/ + tmp_id = oui; + oui = ((tmp_id >> 16) & 0x00000f ); + oui |= ((tmp_id >> 16) & 0x0000f0 ); + oui |= ((tmp_id >> 0) & 0x000f00 ); + oui |= ((tmp_id >> 0) & 0x00f000 ); + oui |= ((tmp_id << 16) & 0x0f0000 ); + oui |= ((tmp_id << 16) & 0xf00000 ); + + if (oui == KS8xx1_OUI) { + return TRUE; + } + return FALSE; +} + +/* + * Name: + * ks8xx1_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked and set in the + * MAC configuration registers + * Arguments: + * p_mac - pointer to MAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8xx1_GetLinkSpeed (AT91PS_EMAC p_mac) +{ + unsigned short stat0, stat1, stat2; + + if (!at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BCR, + &stat0)) { + return FALSE; + } + + if (!at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BSR, + &stat1)) { + return FALSE; + } + + /* link status up? */ + if (!(stat1 & KS8xx1_LINK_STATUS)) { + printf ("No Link\n"); + return FALSE; + } + + if (!at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_ANLPAR, + &stat2)) { + return FALSE; + } + + if (!(stat0 & KS8xx1_AUTONEG)) { + debug ("Auto-negotiation has to be enabled"); + return FALSE; + } + + if (!(stat1 & KS8xx1_AUTONEG_COMP)) { + debug ("Auto-negotiation still in progress"); + return FALSE; + } + + if ((stat1 & KS8xx1_100BASE_TX_FD) && (stat2 & KS8xx1_TX_FDX)) { + /*set Emac for 100BaseTX and Full Duplex */ + debug ("100 MBit, Full Duplex\n"); + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + if ((stat1 & KS8xx1_10BASE_T_FD) && (stat2 & KS8xx1_10_FDX)) { + /*set MII for 10BaseT and Full Duplex */ + debug ("10 MBit, Full Duplex\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ~(AT91C_EMAC_SPD | + AT91C_EMAC_FD)) | AT91C_EMAC_FD; + return TRUE; + } + if ((stat1 & KS8xx1_100BASE_TX_HD) && (stat2 & KS8xx1_TX_HDX)) { + /* set MII for 100BaseTX and Half Duplex */ + debug ("100 MBit, Half Duplex\n"); + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ~(AT91C_EMAC_SPD | + AT91C_EMAC_FD)) | AT91C_EMAC_SPD; + return TRUE; + } + if ((stat1 & KS8xx1_10BASE_T_FD) && (stat2 & KS8xx1_10_HDX)) { + /* set MII for 10BaseT and Half Duplex */ + debug ("10 MBit, Half Duplex\n"); + p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return TRUE; + } + return FALSE; +} + +/* +} + * Name: + * ks8xx1_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation and the same is set in the MAC configuration registers + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +UCHAR ks8xx1_InitPhy (AT91PS_EMAC p_mac) +{ + UCHAR ret = TRUE; + unsigned short IntValue = 0; + + at91rm9200_EmacEnableMDIO (p_mac); + + if (!ks8xx1_GetLinkSpeed (p_mac)) { + /* Try another time */ + ret = ks8xx1_GetLinkSpeed (p_mac); + } + /* Disable PHY Interrupts */ + IntValue &= ~(KS8xx1_JAB_MASK | KS8xx1_RXERR_MASK | KS8xx1_PAREC_MASK | + KS8xx1_PDF_MASK | KS8xx1_LKPAK_MASK | KS8xx1_LKDWN_MASK | + KS8xx1_REFLT_MASK | KS8xx1_LKUP_MASK); + at91rm9200_EmacWritePhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_ICSR, + &IntValue); + at91rm9200_EmacDisableMDIO (p_mac); + return (ret); +} + +/* + * Name: + * ks8xx1_AutoNegotiate + * Description: + * MAC Autonegotiates with the partner status of same is set in the + * MAC configuration registers + * Arguments: + * dev - pointer to struct net_device + * Return value: + * TRUE - if link status set successfully + * FALSE - if link status not set + */ +UCHAR ks8xx1_AutoNegotiate (AT91PS_EMAC p_mac, int *status) +{ + unsigned short value; + unsigned short PhyAnar; + unsigned short PhyAnalpar; + + /* Set ks8xx1 control register */ + if (!at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BCR, + &value)) { + return FALSE; + } + + /* disable auto-negotiation process */ + value &= ~KS8xx1_AUTONEG; + + /* Electrically isolate PHY */ + value |= KS8xx1_ISOLATE; + + if (!at91rm9200_EmacWritePhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BCR, + &value)) { + return FALSE; + } + + /* Set the Auto_negotiation Advertisement Register + * MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, + * IEEE 802.3 + */ + PhyAnar = KS8xx1_NP | KS8xx1_TX_FDX | KS8xx1_TX_HDX | KS8xx1_10_FDX | + KS8xx1_10_HDX | KS8xx1_AN_IEEE_802_3; + + if (!at91rm9200_EmacWritePhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_ANAR, + &PhyAnar)) { + return FALSE; + } + + /* Read the Control Register */ + if (!at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BCR, + &value)) { + return FALSE; + } + + value |= KS8xx1_SPEED_SELECT | KS8xx1_AUTONEG | KS8xx1_DUPLEX_MODE; + + if (!at91rm9200_EmacWritePhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BCR, + &value)) { + return FALSE; + } + + /* Restart Auto_negotiation */ + value |= KS8xx1_RESTART_AUTONEG; + value &= ~KS8xx1_ISOLATE; + + if (!at91rm9200_EmacWritePhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BCR, + &value)) { + return FALSE; + } + /* check AutoNegotiate complete */ + udelay (10000); + + at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_BSR, &value); + if (!(value & KS8xx1_AUTONEG_COMP)) { + return FALSE; + } + + /* Get the AutoNeg Link partner base page */ + if (!at91rm9200_EmacReadPhy (p_mac, CONFIG_PHY_ADDR, KS8xx1_ANLPAR, + &PhyAnalpar)) { + return FALSE; + } + if ((PhyAnar & KS8xx1_TX_FDX) && (PhyAnalpar & KS8xx1_TX_FDX)) { + /* set MII for 100BaseTX and Full Duplex */ + p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + if ((PhyAnar & KS8xx1_10_FDX) && (PhyAnalpar & KS8xx1_10_FDX)) { + /* set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ~(AT91C_EMAC_SPD | + AT91C_EMAC_FD)) | AT91C_EMAC_FD; + return TRUE; + } + return FALSE; +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */