If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to do that, too.
The reason to do so is that this way, U-Boot initial stack can be larger than SPL initial stack. In situations where we want to save the SPL in SRAM for next boot without reloading, this prevents overwriting the SPL DTB in SRAM if U-Boot stack usage gets too high.
To achieve this, the malloc definition for a10 is moved up and sligthly changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v4: - make this patch 2/4 work without changing a10 heap allocation strategy (as the series doing that has been rejected)
Changes in v3: - removed patch 2/5 from v2 (moved to patchwork #1067366, series #99561)
Changes in v2: - fix commit message: "SPL post-reloc", not "SPL pre-reloc"
include/configs/socfpga_common.h | 42 +++++++++++++++----------------- 1 file changed, 20 insertions(+), 22 deletions(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 32ee7426b6..a501b5209f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -26,7 +26,13 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x40000 /* 256KB */ +/* SPL memory allocation configuration, this is for FAT implementation */ +#ifndef CONFIG_SYS_SPL_MALLOC_SIZE +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000 +#endif +#define CONFIG_SYS_INIT_RAM_SIZE (0x40000 - CONFIG_SYS_SPL_MALLOC_SIZE) +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE) #endif
/* @@ -38,12 +44,23 @@ #if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE))) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_BOOTCOUNT_ADDR +#define CONFIG_SPL_STACK CONFIG_SYS_BOOTCOUNT_ADDR #else -#define CONFIG_SYS_INIT_SP_ADDR \ +#define CONFIG_SPL_STACK \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #endif
+/* + * U-Boot stack setup: if SPL post-reloc uses DDR stack, use it in pre-reloc + * phase of U-Boot, too. This prevents overwriting SPL data if stack/heap usage + * in U-Boot pre-reloc is higher than in SPL. + */ +#if defined(CONFIG_SPL_STACK_R_ADDR) && CONFIG_SPL_STACK_R_ADDR +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK_R_ADDR +#else +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK +#endif + #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* @@ -252,16 +269,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #endif
-#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_SPL_MALLOC_SIZE + \ - CONFIG_SYS_INIT_RAM_ADDR) -#endif -#endif - /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -292,15 +299,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #endif
-/* - * Stack setup - */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START -#endif - /* Extra Environment */ #ifndef CONFIG_SPL_BUILD