Hello Hari,
On 21/03/23 19:40, Hari Nagalla wrote:
Introduce the basic j784s4 SoC dtbs from the linux kernel along with the new j784s4 specific pinmux definitions that we will use to generate the dtbs for the u-boot-spl and u-boot binaries.
Signed-off-by: Apurva Nandan a-nandan@ti.com Signed-off-by: Hari Nagalla hnagalla@ti.com
arch/arm/dts/k3-j784s4-evm.dts | 196 +++++ arch/arm/dts/k3-j784s4-main.dtsi | 1007 ++++++++++++++++++++++++ arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi | 311 ++++++++ arch/arm/dts/k3-j784s4.dtsi | 287 +++++++ include/dt-bindings/pinctrl/k3.h | 3 + 5 files changed, 1804 insertions(+) create mode 100644 arch/arm/dts/k3-j784s4-evm.dts create mode 100644 arch/arm/dts/k3-j784s4-main.dtsi create mode 100644 arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j784s4.dtsi
diff --git a/arch/arm/dts/k3-j784s4-evm.dts b/arch/arm/dts/k3-j784s4-evm.dts new file mode 100644 index 0000000000..8cd4a7ecc1 --- /dev/null +++ b/arch/arm/dts/k3-j784s4-evm.dts @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
[...]
+&main_gpio0 {
- status = "okay";
+}; diff --git a/arch/arm/dts/k3-j784s4-main.dtsi b/arch/arm/dts/k3-j784s4-main.dtsi new file mode 100644 index 0000000000..7edf324ac1 --- /dev/null +++ b/arch/arm/dts/k3-j784s4-main.dtsi @@ -0,0 +1,1007 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Device Tree Source for J784S4 SoC Family Main Domain peripherals
- Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
- */
+&cbass_main {
- msmc_ram: sram@70000000 {
compatible = "mmio-sram";reg = <0x00 0x70000000 0x00 0x800000>;#address-cells = <1>;#size-cells = <1>;ranges = <0x00 0x00 0x70000000 0x800000>;atf-sram@0 {reg = <0x00 0x20000>;};tifs-sram@1f0000 {reg = <0x1f0000 0x10000>;};l3cache-sram@200000 {
[...]
- main_navss: bus@30000000 {
compatible = "simple-bus";#address-cells = <2>;#size-cells = <2>;ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
The property: ti,sci-dev-id = <280>; is missing here. Please refer: https://lore.kernel.org/r/20230314152611.140969-2-j-choudhary@ti.com/
dma-coherent;dma-ranges;main_navss_intr: interrupt-controller@310e0000 {compatible = "ti,sci-intr";reg = <0x00 0x310e0000 0x00 0x4000>;ti,intr-trigger-type = <4>;interrupt-controller;interrupt-parent = <&gic500>;#interrupt-cells = <1>;ti,sci = <&sms>;ti,sci-dev-id = <283>;ti,interrupt-ranges = <0 64 64>,<64 448 64>,<128 672 64>;};
[...]
interrupt-names = "int0", "int1";bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;status = "disabled";- };
+}; diff --git a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi new file mode 100644 index 0000000000..93952af618 --- /dev/null +++ b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Device Tree Source for J784S4 SoC Family MCU/WAKEUP Domain peripherals
- Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
- */
+&cbass_mcu_wakeup {
- sms: system-controller@44083000 {
compatible = "ti,k2g-sci";ti,host-id = <12>;mbox-names = "rx", "tx";mboxes = <&secure_proxy_main 11>,<&secure_proxy_main 13>;reg-names = "debug_messages";reg = <0x00 0x44083000 0x00 0x1000>;k3_pds: power-controller {
[...]
interrupt-names = "int0", "int1";bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;status = "disabled";- };
- mcu_navss: bus@28380000{
compatible = "simple-bus";#address-cells = <2>;#size-cells = <2>;ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
The property ti,sci-dev-id = <323>; is missing here. Please refer: https://lore.kernel.org/r/20230314152611.140969-2-j-choudhary@ti.com/
dma-coherent;dma-ranges;mcu_ringacc: ringacc@2b800000 {compatible = "ti,am654-navss-ringacc";reg = <0x00 0x2b800000 0x00 0x400000>,
[...]