This series add a support of tracing for RISC-V arch.
This series is also available here [1] for testing. [1] https://github.com/pragnesh26992/u-boot/tree/trace
How to test this patch: 1) Enable tracing in "configs/sifive_fu540_defconfig" CONFIG_TRACE=y CONFIG_TRACE_BUFFER_SIZE=0x01000000 CONFIG_TRACE_CALL_DEPTH_LIMIT=15 CONFIG_CMD_TRACE=y
2) make FTRACE=1 sifive_fu540_defconfig 3) make FTRACE=1
Changes in v3: - Added gd->arch.plmt in global data - For timer_get_us(), use readq() instead of andes_plmt_get_count() and sifive_clint_get_count()
Changes in v2: - Remove newly added timer file (arch/riscv/lib/timer.c) - Added timer_get_us() in riscv_timer.c, sifive_clint_timer.c and andes_plmt_timer.c.
Following are the boot messages on FU540 five cores SMP platform:
U-Boot SPL 2021.01-rc1-00244-g88b5af756c-dirty (Nov 11 2020 - 14:57:25 +0530) Trying to boot from MMC1
U-Boot 2021.01-rc1-00244-g88b5af756c-dirty (Nov 11 2020 - 14:57:25 +0530)
CPU: rv64imafdc Model: SiFive HiFive Unleashed A00 DRAM: 8 GiB trace: enabled MMC: spi@10050000:mmc@0: 0 *** Warning - bad CRC, using default environment
In: serial@10010000 Out: serial@10010000 Err: serial@10010000 Board serial number should not be 0 !! Net: Error: ethernet@10090000 address not set. No ethernet found.
Hit any key to stop autoboot: 0 => trace stats 178,556 function sites 15,443,168 function calls 1 untracked function calls 1,279,056 traced function calls (14135744 dropped due to overflow) 19 maximum observed call depth 15 call depth limit 15,633,052 calls not traced due to depth =>
Pragnesh Patel (1): riscv: Add timer_get_us() for tracing
arch/riscv/include/asm/global_data.h | 3 +++ drivers/timer/andes_plmt_timer.c | 19 ++++++++++++++++++- drivers/timer/riscv_timer.c | 14 +++++++++++++- drivers/timer/sifive_clint_timer.c | 19 ++++++++++++++++++- 4 files changed, 52 insertions(+), 3 deletions(-)