13 Oct
2015
13 Oct
'15
10:12 p.m.
Bonjour Fabio,
Le Tue, 13 Oct 2015 12:30:47 -0300, Fabio Estevam festevam@gmail.com a écrit :
On Tue, Oct 13, 2015 at 12:28 PM, Fabio Estevam festevam@gmail.com wrote:
On Fri, Oct 9, 2015 at 5:38 PM, Anthony Felice tony.felice@timesys.com wrote:
This commit fixes a typo in vf610twr DRAM init that was causing a hang in U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc (vf610: refactor DDRMC code).
Signed-off-by: Anthony Felice tony.felice@timesys.com
Reviewed-by: Fabio Estevam fabio.estevam@freescale.com
Also, adding the author of 3f353cecc ("vf610: refactor DDRMC code") and the i.MX/Vybrid maintainer.
Thanks
Thanks to Anthony for spotting and fixing this!
Cordialement, Albert ARIBAUD 3ADEV