Hello! (sorry for my english) I need help! Did you find solve with sd card for board with 9260/9g20? I have board with at91sam9g20 and I have bug - gen_atmel_mci: CMDR 000d1052 (18) ARGR 0000ec00 (SR: 0000c0d7) XFER DTIP never unset, ignoring u-boot 2011.12 All it works without mmc/sd. My bug: U-Boot> mmc part mci: setting clock 195312 Hz, block size 512 mci: setting clock 195312 Hz, block size 512 mci: setting clock 195312 Hz, block size 512 mci: setting clock 195312 Hz, block size 512 mci: setting clock 12500000 Hz, block size 512
Partition Map for MMC device 0 -- Partition Type: DOS
Partition Start Sector Num Sectors Type 1 62 389484 c U-Boot> fatls mmc 0:1 8868 boot.bin 247112 u-boot.bin
2 file(s), 0 dir(s)
U-Boot> fatload mmc 0:1 0x20400000 u-boot.bin 247112 reading u-boot.bin gen_atmel_mci: CMDR 000d1052 (18) ARGR 0000ec00 (SR: 0000c0d7) XFER DTIP never unset, ignoring u-boot.bin for example I have tried kernel.img too and more other. ext2 have like this. I can read partitions and I can see files tree but...
My configs:
board/atmel/at91sam9260ek.c
#include <common.h> #include <net.h> #include <netdev.h> #include <mmc.h> #include <spi.h> #include <asm/io.h> #include <asm/arch/hardware.h> #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91cap9.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) # include <net.h> #endif #include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */ /* * Miscelaneous platform dependent initialisations */
#ifdef CONFIG_CMD_NAND static void at91sam9260ek_nand_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; unsigned long csa;
/* Assign CS3 to NAND/SmartMedia Interface */ csa = readl(&matrix->ebicsa); csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; writel(csa, &matrix->ebicsa);
/* Configure SMC CS3 for NAND/SmartMedia */ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), &smc->cs[3].setup); writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), &smc->cs[3].pulse); writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), &smc->cs[3].cycle); writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | AT91_SMC_MODE_EXNW_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_MODE_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_MODE_DBW_8 | #endif AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);
/* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
/* Enable NandFlash */ at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
} #endif
#ifdef CONFIG_MACB static void at91sam9260ek_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; unsigned long erstl;
/* Enable EMAC clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
/* * Disable pull-up on: * RXDV (PA17) => PHY normal mode (not Test mode) * ERX0 (PA14) => PHY ADDR0 * ERX1 (PA15) => PHY ADDR1 * ERX2 (PA25) => PHY ADDR2 * ERX3 (PA26) => PHY ADDR3 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 * * PHY has internal pull-down */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), &pioa->pudr);
erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
/* Need to reset PHY -> 500ms reset */ writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | AT91_RSTC_MR_URSTEN, &rstc->mr);
writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
/* Wait for end hardware reset */ while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) ;
/* Restore NRST value */ writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
/* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), &pioa->puer);
/* Initialize EMAC=MACB hardware */ at91_macb_hw_init(); } #endif
int board_early_init_f(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/* Enable clocks for all PIOs */ writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | (1 << ATMEL_ID_PIOC), &pmc->pcer);
return 0; }
int board_init(void) { #ifdef CONFIG_AT91SAM9G20EK /* arch number of AT91SAM9260EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK; #else /* arch number of AT91SAM9260EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK; #endif /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND at91sam9260ek_nand_hw_init(); #endif #ifdef CONFIG_HAS_DATAFLASH at91_spi0_hw_init((1 << 0) | (1 << 1)); #endif #ifdef CONFIG_MACB at91sam9260ek_macb_hw_init(); #endif
return 0; }
int dram_init(void) { gd->ram_size = get_ram_size( (void *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); return 0; }
#ifdef CONFIG_RESET_PHY_R void reset_phy(void) { } #endif
int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); #endif return rc; }
#ifdef CONFIG_GENERIC_ATMEL_MCI int board_mmc_init(bd_t *bd) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* Enable MCI clock */ writel(1 << ATMEL_ID_MCI, &pmc->pcer); at91_mci_hw_init(); /* This calls the atmel_mmc_init in gen_atmel_mci.c */ return atmel_mci_init((void *)ATMEL_BASE_MCI); }
/* return *cd = TRUE if card is NOT detected. */ int board_mmc_getcd(u8 *cd, struct mmc *mmc) { /* This board don't support card detection. */ //*cd = 0; *cd = at91_get_gpio_value (CONFIG_SYS_MMC_CD_PIN) ? 1 : 0; return 0; } #else void board_mmc_init(bd_t *bd) {} #endif
/include/configs/at91sam9260ek.h
#ifndef __CONFIG_H #define __CONFIG_H
/* * SoC must be defined first, before hardware.h is included. * In this case SoC is defined in boards.cfg. */ #include <asm/hardware.h>
/* * Warning: changing CONFIG_SYS_TEXT_BASE requires * adapting the initial boot program. * Since the linker has to swallow that define, we must use a pure * hex number here! */ #define CONFIG_SYS_TEXT_BASE 0x21D00000
/* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ #define AT91C_MASTER_CLOCK 100000000 #define CONFIG_SYS_HZ 1000
/* WATCHDOG */ #define CONFIG_AT91SAM9_WATCHDOG 1 #define CONFIG_HW_WATCHDOG 1
/* BOARD CONFIGS ADDON */ #define CONFIG_CLOCKS_IN_MHZ 300 #define CONFIG_MEMSIZE_IN_BYTES 33554432 #define CONFIG_MACH_TYPE "super ARM"
/* Define actual evaluation board type from used processor type */ #ifdef CONFIG_AT91SAM9G20 #define CONFIG_AT91SAM9G20EK /* It's an Atmel AT91SAM9G20 EK */ #else #define CONFIG_AT91SAM9260EK /* It's an Atmel AT91SAM9260 EK */ #endif
/* Misc CPU related */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAG 1 #define CONFIG_INITRD_TAG 1 #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO
/* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ #define CONFIG_AT91_GPIO 1 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
/* serial console */ #define CONFIG_ATMEL_USART #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600}
/* NETWORK CONSOLE */ #define CONFIG_NETCONSOLE 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
/* LED */ #define CONFIG_AT91_LED 1 //#define CONFIG_RED_LED AT91_PIN_PA9 /* this is the power led */ #define CONFIG_GREEN_LED AT91_PIN_PB20 /* this is the user led */
/* SD/MMC card */ #define CONFIG_MMC 1 #define CONFIG_GENERIC_MMC 1 #define CONFIG_GENERIC_ATMEL_MCI 1 //#define CONFIG_ATMEL_MCI 1 //#define AT91_PMC_PCER (AT91_PMC + 0x10) //#define AT91SAM9260_ID_MCI 9 //#define ATMEL_BASE_MCI 0xFFFA8000 //#define ATMEL_BASE_MMCI 0xFFF02400 #define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PA4 //#define CONFIG_SYS_MMC_CLK_OD 1000000
/* MTD SUPPORT */
#define CONFIG_MTD_DEVICE 1 #define CONFIG_MTD_PARTITIONS 1
/* BOOT PARAMETERS */ #define CONFIG_BOOTDELAY 2 #define CONFIG_BOOTCOUNT_LIMIT 5
/* * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE 1 #define CONFIG_BOOTP_BOOTPATH 1 #define CONFIG_BOOTP_GATEWAY 1 #define CONFIG_BOOTP_HOSTNAME 1 #define CONFIG_BOOTP_DNS 1 #define CONFIG_BOOTP_DNS2 1 #define CONFIG_BOOTP_SUBNETMASK 1 #define CONFIG_BOOTP_SEND_HOSTNAME 1 #define CONFIG_BOOTP_NTPSERVER 1 #define CONFIG_BOOTP_TIMEOFFSET 1 #define CONFIG_BOOTP_SERVERIP 1 //#define CONFIG_BOOTP_VENDOREX 1 #define CONFIG_BOOTP_DHCP_REQUEST_DELAY 1
/* * Command line configuration. */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_SOURCE
#define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 #define CONFIG_CMD_USB 1 #define CONFIG_CMD_MMC 1 #define CONFIG_CMD_EXT2 1 #define CONFIG_CMD_FAT 1 //#define CONFIG_CMD_MTDPARTS 1 #define CONFIG_CMD_CACHE 1 #define CONFIG_CMD_GO 1 #define CONFIG_CMD_IMPORTENV 1 #define CONFIG_CMD_PING 1 #define CONFIG_CMD_SDRAM 1 #define CONFIG_CMD_TFTPSRV 1 #define CONFIG_CMD_TFTPPUT 1 #define CONFIG_CMD_DNS 1
/* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32Mb */
/* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, * leaving the correct space for initial global data structure above * that address while providing maximum stack area below. */ #ifdef CONFIG_AT91SAM9XE #define CONFIG_SYS_INIT_SP_ADDR \ (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) #else #define CONFIG_SYS_INIT_SP_ADDR \ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) #endif
/* DataFlash */ //#define CONFIG_ATMEL_DATAFLASH_SPI //#define CONFIG_HAS_DATAFLASH //#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) //#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 //#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ //#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ //#define AT91_SPI_CLK 15000000
//#ifdef CONFIG_AT91SAM9G20EK //#define DATAFLASH_TCSS (0x22 << 16) //#else //#define DATAFLASH_TCSS (0x1a << 16) //#endif //#define DATAFLASH_TCHS (0x1 << 24)
/* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 #define CONFIG_JFFS2_NAND 1 #define CONFIG_MTD_NAND_ECC_JFFS2 1 #define CONFIG_SYS_JFFS_CUSTOM_PART 1 //#define CONFIG_SYS_JFFS_SINGLE_PART 1 //#define CONFIG_JFFS2_NAND_DEV 0 //#define CONFIG_JFFS2_NAND_OFF 0 //#define CONFIG_JFFS2_NAND_SIZE 2562424 #endif
/* NOR flash - no real flash on this board */ #define CONFIG_SYS_NO_FLASH 1
/* Ethernet */ #define CONFIG_MACB 1 #define CONFIG_MACB_SEARCH_PHY 1 #define CONFIG_RMII 1 #define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 5 #define CONFIG_RESET_PHY_R 1
/* USB */ #define CONFIG_USB_ATMEL 1 #define CONFIG_USB_OHCI_NEW 1 //#define CONFIG_USB_UHCI 1 #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 #define CONFIG_CMD_FAT 1 //#define CONFIG_USB_HOST_ETHER 1
#define CONFIG_SYS_LOAD_ADDR 0x20400000 /* load address */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 8000 #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - 0x400000
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_ENV_IS_IN_DATAFLASH 1 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) #define CONFIG_ENV_OFFSET 0x4200 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock0 " \ "mtdparts=atmel_nand:-(root) " \ "rw rootfstype=jffs2"
#elif CONFIG_SYS_USE_DATAFLASH_CS1
/* bootstrap + u-boot + env + linux in dataflash on CS1 */ #define CONFIG_ENV_IS_IN_DATAFLASH 1 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) #define CONFIG_ENV_OFFSET 0x4200 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock0 " \ "mtdparts=atmel_nand:-(root) " \ "rw rootfstype=jffs2"
#else /* CONFIG_SYS_USE_NANDFLASH */
/* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_OFFSET 0x200000 #define CONFIG_ENV_OFFSET_REDUND 0x300000 #define CONFIG_ENV_SIZE 0x100000 /* 1 sector = 1Mb*/
#define CONFIG_BOOTCOMMAND "run logic_boot" #define CONFIG_BOOTARGS "console=ttyS0,115200 mem=32M initrd=0x21100000,8M rdinit=/sbin/init root=/dev/mtdblock6 rw init=/sbin/init rootfstype=ext2,jffs2 panic=10" #define CONFIG_PREBOOT "run logic_netconsole"
#define CONFIG_EXTRA_ENV_SETTINGS \ "ncip=10.1.30.4\0" \ "ethaddr=00:1f:f2:00:00:00\0" \ "netmask=255.248.0.0\0" \ "ipaddr=10.1.30.30\0" \ "serverip=10.1.30.2\0" \ "hostname=subject1\0" \ "bootlimit=5\0" \ "args_initrd=console=ttyS0,115200 mem=32M initrd=0x21100000,8M root=/dev/ram0 rw panic=10\0" \ "args_rootfs=console=ttyS0,115200 mem=32M root=/dev/mtdblock6 rootfstype=jffs2 rw noinitrd panic=10\0" \ "mem_addr_kernel=0x20400000\0" \ "mem_addr_initrd=0x21100000\0" \ "image_kernel=kernel.img\0" \ "image_initrd=initrd.img\0" \ "image_rootfs=rootfs.img\0" \ "image_uboot=u-boot.bin\0" \ "image_kernel_size=0x800000\0" \ "image_initrd_size=0x800000\0" \ "image_rootfs_size=0x1000000\0" \ "image_uboot_size=0x100000\0" \ "image_backup_kernel_size=0x800000\0" \ "image_backup_initrd_size=0x800000\0" \ "image_backup_rootfs_size=0x1000000\0" \ "image_kernel_start_addr=0x400000\0" \ "image_initrd_start_addr=0xC00000\0" \ "image_rootfs_start_addr=0x1400000\0" \ "image_uboot_start_addr=0x100000\0" \ "image_backup_kernel_start_addr=0xA400000\0" \ "image_backup_initrd_start_addr=0xAC00000\0" \ "image_backup_rootfs_start_addr=0xB400000\0" \ "uboot_env_start_addr=0x200000\0" \ "uboot_env_size=0x200000\0" \ "altbootcmd=run boot_restore\0" \ "changebootcmd=setenv bootcmd run boot_initrd; saveenv\0" \ "save_env=if test ${bootcount} = 1 ;then saveenv ;fi\0" \ "netcon=setenv echo 'Starting network console' ;setenv stdin nc; setenv stdout nc; setenv stderr nc; echo 'Done'\0" \ "sercon=setenv echo 'Starting serial console' ;setenv stderr serial; setenv stdin serial; setenv stdout serial; echo 'Done'\0" \ "autoupdate=echo 'Starting update from tftp server ip - '${serverip}; run update_kernel && run update_initrd && run update_rootfs && run update_backup && echo 'Done: Restarting...' && reset\0" \ "restore_kernel=nand read.jffs2 ${mem_addr_kernel} ${image_backup_kernel_start_addr} ${image_backup_kernel_size}; nand write.jffs2 ${mem_addr_kernel} ${image_kernel_start_addr} ${image_kernel_size}\0" \ "restore_initrd=nand read.jffs2 ${mem_addr_kernel} ${image_backup_initrd_start_addr} ${image_backup_initrd_size}; nand write.jffs2 ${mem_addr_kernel} ${image_initrd_start_addr} ${image_initrd_size}\0" \ "restore_rootfs=nand read.jffs2 ${mem_addr_kernel} ${image_backup_rootfs_start_addr} ${image_backup_rootfs_size}; nand write.jffs2 ${mem_addr_kernel} ${image_rootfs_start_addr} ${image_rootfs_size}\0" \ "restore=run restore_kernel && run restore_initrd && run restore_rootfs\0" \ "logic_netconsole=run sercon; echo 'Try to load network console server ip - '${ncip}' client-device ip - '${ipaddr}; if ping ${ncip}; then run netcon; else run sercon; fi; run save_env\0" \ "logic_boot=echo 'Try to boot device with boot args - '${bootargs}; echo 'bootcount='${bootcount}' and bootlimit='${bootlimit}; run boot_initrd || run logic_autoupdate\0" \ "logic_autoupdate=echo 'Failed to boot, try to recovery rootfs'; if ping ${serverip}; then run autoupdate; else echo 'Update is failed from ip - '${serverip}; fi\0" \ "boot_restore=echo 'Run restore, because bootcount is great bootlimit'; echo 'bootcount='${bootcount}' is greater bootlimit='${bootlimit}; run restore && echo 'Restore is done, turn off power after resetting' && setenv bootlimit 0 && saveenv && echo 'Resetting...' && reset\0" \ "update_kernel=tftpboot ${mem_addr_kernel} ${image_kernel} && nand erase ${image_kernel_start_addr} ${image_kernel_size} && nand write.jffs2 ${mem_addr_kernel} ${image_kernel_start_addr} ${image_kernel_size}\0" \ "update_initrd=tftpboot ${mem_addr_kernel} ${image_initrd} && nand erase ${image_initrd_start_addr} ${image_initrd_size} && nand write.jffs2 ${mem_addr_kernel} ${image_initrd_start_addr} ${image_initrd_size}\0" \ "update_rootfs=tftpboot ${mem_addr_kernel} ${image_rootfs} && nand erase ${image_rootfs_start_addr} ${image_rootfs_size} && nand write.jffs2 ${mem_addr_kernel} ${image_rootfs_start_addr} ${image_rootfs_size}\0" \ "update_uboot=tftpboot ${mem_addr_kernel} ${image_uboot} && nand erase ${image_uboot_start_addr} ${image_uboot_size} && nand write.jffs2 ${mem_addr_kernel} ${image_uboot_start_addr} ${image_uboot_size} && nand erase ${uboot_env_start_addr} ${uboot_env_size} && echo 'Done u-boot update. Restarting...' && reset\0" \ "update_backup_kernel=tftpboot ${mem_addr_kernel} ${image_kernel} && nand erase ${image_backup_kernel_start_addr} ${image_backup_kernel_size} && nand write.jffs2 ${mem_addr_kernel} ${image_backup_kernel_start_addr} ${image_backup_kernel_size}\0" \ "update_backup_initrd=tftpboot ${mem_addr_kernel} ${image_initrd} && nand erase ${image_backup_initrd_start_addr} ${image_backup_initrd_size} && nand write.jffs2 ${mem_addr_kernel} ${image_backup_initrd_start_addr} ${image_backup_initrd_size}\0" \ "update_backup_rootfs=tftpboot ${mem_addr_kernel} ${image_rootfs} && nand erase ${image_backup_rootfs_start_addr} ${image_backup_rootfs_size} && nand write.jffs2 ${mem_addr_kernel} ${image_backup_rootfs_start_addr} ${image_backup_rootfs_size}\0" \ "update_backup=run update_backup_kernel && run update_backup_initrd && run update_backup_rootfs\0" \ "read_kernel=nand read.jffs2 ${mem_addr_kernel} ${image_kernel_start_addr} ${image_kernel_size}\0" \ "read_initrd=nand read.jffs2 ${mem_addr_initrd} ${image_initrd_start_addr} ${image_initrd_size}\0" \ "boot_nand=run read_kernel; bootm ${mem_addr_kernel}\0" \ "boot_initrd=run read_kernel; run read_initrd; bootm ${mem_addr_kernel}\0" \ "boot_ram_initrd=tftpboot ${mem_addr_kernel} ${image_kernel} && tftpboot ${mem_addr_initrd} ${image_initrd} && bootm ${mem_addr_kernel}\0" \ "bootdelay=2\0" #endif
#define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT "U-Boot> " #define CONFIG_SYS_PROMPT_HUSH_PS2 "# " #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_AUTO_COMPLETE
/* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 12824, 0x1000)
#define CONFIG_STACKSIZE (3224) /* regular stack */
#ifdef CONFIG_USE_IRQ #error CONFIG_USE_IRQ not supported #endif
#endif