This patch: - Enables autodetection of NAND bus-width by reading ONFI parameter page, during device-scan (nand_scan_ident), removed dependency on static configuration in GPMC_CONFIG1_X register. - adds reconfiguration of device-width in GPMC_CONFIG1_x
Signed-off-by: Pekon Gupta pekon@ti.com --- drivers/mtd/nand/omap_gpmc.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index b044f00..944f0ea 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -834,10 +834,7 @@ int board_nand_init(struct nand_chip *nand) nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd; nand->priv = &bch_priv; nand->cmd_ctrl = omap_nand_hwcontrol; - nand->options = NAND_NO_PADDING | NAND_CACHEPRG; - /* If we are 16 bit dev, our gpmc config tells us that */ - if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000) - nand->options |= NAND_BUSWIDTH_16; + nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_BUSWIDTH_AUTO;
nand->chip_delay = 100; nand->ecc.layout = &omap_ecclayout;