This commit adds CPU and silicon version information consuming the SLCR IDCODE and DEVCFG MCTRL registers, respectively.
Signed-off-by: Ariel D'Alessandro ariel@vanguardiasur.com.ar Signed-off-by: Ezequiel Garcia ezequiel@vanguardiasur.com.ar --- arch/arm/mach-zynq/cpu.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+)
diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index 53a07b0059c2..602f483c162b 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -35,6 +35,25 @@ static const struct { }; #endif
+#ifdef CONFIG_DISPLAY_CPUINFO +static const struct { + u8 idcode; + const char *cpuinfo; +} zynq_cpu_info[] = { + { .idcode = XILINX_ZYNQ_7007S, .cpuinfo = XILINX_XC7Z007S_NAME }, + { .idcode = XILINX_ZYNQ_7010, .cpuinfo = XILINX_XC7Z010_NAME }, + { .idcode = XILINX_ZYNQ_7012S, .cpuinfo = XILINX_XC7Z012S_NAME }, + { .idcode = XILINX_ZYNQ_7014S, .cpuinfo = XILINX_XC7Z014S_NAME }, + { .idcode = XILINX_ZYNQ_7015, .cpuinfo = XILINX_XC7Z015_NAME }, + { .idcode = XILINX_ZYNQ_7020, .cpuinfo = XILINX_XC7Z020_NAME }, + { .idcode = XILINX_ZYNQ_7030, .cpuinfo = XILINX_XC7Z030_NAME }, + { .idcode = XILINX_ZYNQ_7035, .cpuinfo = XILINX_XC7Z035_NAME }, + { .idcode = XILINX_ZYNQ_7045, .cpuinfo = XILINX_XC7Z045_NAME }, + { .idcode = XILINX_ZYNQ_7100, .cpuinfo = XILINX_XC7Z100_NAME }, + { /* Sentinel */ }, +}; +#endif + int arch_cpu_init(void) { zynq_slcr_unlock(); @@ -99,3 +118,30 @@ const xilinx_desc *zynq_fpga_desc(void) return NULL; } #endif + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + u32 idcode, version; + bool found; + u8 i; + + idcode = zynq_slcr_get_idcode(); + found = false; + for (i = 0; zynq_cpu_info[i].idcode; i++) { + if (zynq_cpu_info[i].idcode == idcode) { + found = true; + break; + } + } + + version = zynq_get_silicon_version() << 1; + if (version > (PCW_SILICON_VERSION_3 << 1)) + version += 1; + if (found) { + printf("CPU: Zynq %s\n", zynq_cpu_info[i].cpuinfo); + printf("Silicon: v%d.%d\n", version >> 1, version & 1); + } + return 0; +} +#endif