[U-Boot] [PATCH 04/10] powerpc: mpc8xx: remove stxxtc board support

22 Jul 2014

This board has been orphaned for a while and old enough.
Because this is the last board defining CONFIG_MPC885_FAMILY,
drivers/usb/gadget/mpc8xx_udc.c has also been dropped.
Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com
---
arch/powerpc/cpu/mpc8xx/fec.c     |   79 +--
 board/stx/stxxtc/Makefile         |    8 -
 board/stx/stxxtc/README.stxxtc    |   59 --
 board/stx/stxxtc/stxxtc.c         |  592 ----------------
 board/stx/stxxtc/u-boot.lds       |   82 ---
 board/stx/stxxtc/u-boot.lds.debug |  121 ----
 boards.cfg                        |    1 -
 doc/README.scrapyard              |    1 +
 drivers/serial/usbtty.h           |    4 +-
 drivers/usb/gadget/Makefile       |    1 -
 drivers/usb/gadget/mpc8xx_udc.c   | 1386 -------------------------------------
 include/common.h                  |    5 +-
 include/configs/stxxtc.h          |  485 -------------
 include/status_led.h              |    4 -
 include/usb/mpc8xx_udc.h          |  178 -----
 include/usb/udc.h                 |    4 +-
 16 files changed, 6 insertions(+), 3004 deletions(-)
 delete mode 100644 board/stx/stxxtc/Makefile
 delete mode 100644 board/stx/stxxtc/README.stxxtc
 delete mode 100644 board/stx/stxxtc/stxxtc.c
 delete mode 100644 board/stx/stxxtc/u-boot.lds
 delete mode 100644 board/stx/stxxtc/u-boot.lds.debug
 delete mode 100644 drivers/usb/gadget/mpc8xx_udc.c
 delete mode 100644 include/configs/stxxtc.h
 delete mode 100644 include/usb/mpc8xx_udc.h

diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index d12b3df..60696ba 100644
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -377,54 +377,10 @@ static void fec_pin_init(int fecidx)
     */
    immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
-#if defined(CONFIG_MPC885_FAMILY) && defined(WANT_MII)
-	/* use MDC for MII */
-	immr->im_ioport.iop_pdpar |=  0x0080;
-	immr->im_ioport.iop_pddir &= ~0x0080;
-#endif
-
    if (fecidx == 0) {
 #if defined(CONFIG_ETHER_ON_FEC1)
-#if defined(CONFIG_MPC885_FAMILY) /* MPC87x/88x have got 2 FECs and different pinout */
-
-#if !defined(CONFIG_RMII)
-
-		immr->im_ioport.iop_papar |=  0xf830;
-		immr->im_ioport.iop_padir |=  0x0830;
-		immr->im_ioport.iop_padir &= ~0xf000;
-
-		immr->im_cpm.cp_pbpar     |=  0x00001001;
-		immr->im_cpm.cp_pbdir     &= ~0x00001001;
-
-		immr->im_ioport.iop_pcpar |=  0x000c;
-		immr->im_ioport.iop_pcdir &= ~0x000c;
-
-		immr->im_cpm.cp_pepar     |=  0x00000003;
-		immr->im_cpm.cp_pedir     |=  0x00000003;
-		immr->im_cpm.cp_peso      &= ~0x00000003;
-
-		immr->im_cpm.cp_cptr      &= ~0x00000100;
-
-#else
-
-#if !defined(CONFIG_FEC1_PHY_NORXERR)
-		immr->im_ioport.iop_papar |=  0x1000;
-		immr->im_ioport.iop_padir &= ~0x1000;
-#endif
-		immr->im_ioport.iop_papar |=  0xe810;
-		immr->im_ioport.iop_padir |=  0x0810;
-		immr->im_ioport.iop_padir &= ~0xe000;
-
-		immr->im_cpm.cp_pbpar     |=  0x00000001;
-		immr->im_cpm.cp_pbdir     &= ~0x00000001;
-
-		immr->im_cpm.cp_cptr      |=  0x00000100;
-		immr->im_cpm.cp_cptr      &= ~0x00000050;
-
-#endif /* !CONFIG_RMII */
-
-#elif !defined(CONFIG_ICU862)
+#if !defined(CONFIG_ICU862)
    	/*
    	 * Configure all of port D for MII.
    	 */
@@ -474,39 +430,6 @@ static void fec_pin_init(int fecidx)
 #endif				/* !defined(CONFIG_ICU862) */
#endif	/* CONFIG_ETHER_ON_FEC1 */
-	} else if (fecidx == 1) {
-
-#if defined(CONFIG_ETHER_ON_FEC2)
-
-#if defined(CONFIG_MPC885_FAMILY) /* MPC87x/88x have got 2 FECs and different pinout */
-
-#if !defined(CONFIG_RMII)
-		immr->im_cpm.cp_pepar     |=  0x0003fffc;
-		immr->im_cpm.cp_pedir     |=  0x0003fffc;
-		immr->im_cpm.cp_peso      &= ~0x000087fc;
-		immr->im_cpm.cp_peso      |=  0x00037800;
-
-		immr->im_cpm.cp_cptr      &= ~0x00000080;
-#else
-
-#if !defined(CONFIG_FEC2_PHY_NORXERR)
-		immr->im_cpm.cp_pepar     |=  0x00000010;
-		immr->im_cpm.cp_pedir     |=  0x00000010;
-		immr->im_cpm.cp_peso      &= ~0x00000010;
-#endif
-		immr->im_cpm.cp_pepar     |=  0x00039620;
-		immr->im_cpm.cp_pedir     |=  0x00039620;
-		immr->im_cpm.cp_peso      |=  0x00031000;
-		immr->im_cpm.cp_peso      &= ~0x00008620;
-
-		immr->im_cpm.cp_cptr      |=  0x00000080;
-		immr->im_cpm.cp_cptr      &= ~0x00000028;
-#endif /* CONFIG_RMII */
-
-#endif /* CONFIG_MPC885_FAMILY */
-
-#endif /* CONFIG_ETHER_ON_FEC2 */
-
    }
 }
diff --git a/board/stx/stxxtc/Makefile b/board/stx/stxxtc/Makefile
deleted file mode 100644
index 6738d4e..0000000
--- a/board/stx/stxxtc/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= stxxtc.o
diff --git a/board/stx/stxxtc/README.stxxtc b/board/stx/stxxtc/README.stxxtc
deleted file mode 100644
index 7d9d4d3..0000000
--- a/board/stx/stxxtc/README.stxxtc
+++ /dev/null
@@ -1,59 +0,0 @@
-
-
-First, some build notes on the Silicon Turnkey eXpress XTc.
-
-This board has both 87x/88x procesor options at various
-frequencies.  The configuration file has some macros for setting
-the clock speed, not all have been tested.  They all have
-a 10MHz input clock.  Please do not check in a configuration
-file that selects a high speed not available on all processors.
-We chose the 66MHz core and bus speed, which should be OK on
-all boards.  If you have a processor, lucky you! :-)
-Just build a new configuration with that speed, check
-the macro configuration to ensure it's correct.  If the
-macro is updated, please check that in, but keep default
-processor speed.
-
-The board is likely to have more than 1Mbyte of NOR boot flash.
-It was also configured with a high boot vector (Dan's fault)
-so the standard 8xx mapping doesn't work well. We had to move
-the addresses around a little bit so one copy would work.  The
-flash got fragmented, and we are working on a better solution.
-There is an "xtc.cfg" floating around for the BDI2000, use
-that for programming a new version of U-Boot.  You can probably
-find it on the Silicon Turnkey eXpress (www.silicontkx.com),
-Embedded Alley Solutions (embeddedalley.com), or Denx (denx.de)
-servers.
-
-The board will also have various SDRAM sizes, but the code
-should automatically determine the amount of memory.
-
-There are a couple of different board versions, visually
-they use different BGA or surface mount memory parts.  However,
-they are logically the same board.
-
-Now, some operational notes.
-
-The board has the option of sporting two FEC Ethernet ports.
-The second port isn't configured to be automatically available
-because it would cause U-Boot to generate a board data structure
-(the bd_t) with multiple MAC addresses and be incompatible with
-standard 8xx kernel builds.  You can use/test the second FEC
-in U-Boot by assigning an 'eth1addr' and selecting the second
-FEC as the port to use.
-
-Since this is just a development board and not a product, STx
-does not assign unique MAC addresses.  We just pilfer the
-"default" ones used by Wolfgang on some other boards.  Please
-ensure you assign unique MAC addresses when using these boards.
-
-The serial port baud rate is 38400, because that's the way
-I like it :-)
-
-Thanks to Pantelis for lots of the work on this board port.
-
-Have Fun!
-
-	-- Dan
-
-15 August 2005
diff --git a/board/stx/stxxtc/stxxtc.c b/board/stx/stxxtc/stxxtc.c
deleted file mode 100644
index 1996efb..0000000
--- a/board/stx/stxxtc/stxxtc.c
+++ /dev/null
@@ -1,592 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) Copyright 2005
- * Dan Malek, Embedded Edge, LLC, dan@embeddededge.com
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * U-Boot port on STx XTc board
- * Mostly copied from Netta
- */
-
-#include <common.h>
-#include <miiphy.h>
-
-#include "mpc8xx.h"
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-#endif
-
-/****************************************************************/
-
-/* some sane bit macros */
-#define _BD(_b)				(1U << (31-(_b)))
-#define _BDR(_l, _h)			(((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
-
-#define _BW(_b)				(1U << (15-(_b)))
-#define _BWR(_l, _h)			(((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
-
-#define _BB(_b)				(1U << (7-(_b)))
-#define _BBR(_l, _h)			(((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
-
-#define _B(_b)				_BD(_b)
-#define _BR(_l, _h)			_BDR(_l, _h)
-
-/****************************************************************/
-
-/*
- * Check Board Identity:
- *
- * Return 1 always.
- */
-
-int checkboard(void)
-{
-	printf ("Silicon Turnkey eXpress XTc\n");
-	return (0);
-}
-
-/****************************************************************/
-
-#define _NOT_USED_	0xFFFFFFFF
-
-/****************************************************************/
-
-#define CS_0000		0x00000000
-#define CS_0001		0x10000000
-#define CS_0010		0x20000000
-#define CS_0011		0x30000000
-#define CS_0100		0x40000000
-#define CS_0101		0x50000000
-#define CS_0110		0x60000000
-#define CS_0111		0x70000000
-#define CS_1000		0x80000000
-#define CS_1001		0x90000000
-#define CS_1010		0xA0000000
-#define CS_1011		0xB0000000
-#define CS_1100		0xC0000000
-#define CS_1101		0xD0000000
-#define CS_1110		0xE0000000
-#define CS_1111		0xF0000000
-
-#define BS_0000		0x00000000
-#define BS_0001		0x01000000
-#define BS_0010		0x02000000
-#define BS_0011		0x03000000
-#define BS_0100		0x04000000
-#define BS_0101		0x05000000
-#define BS_0110		0x06000000
-#define BS_0111		0x07000000
-#define BS_1000		0x08000000
-#define BS_1001		0x09000000
-#define BS_1010		0x0A000000
-#define BS_1011		0x0B000000
-#define BS_1100		0x0C000000
-#define BS_1101		0x0D000000
-#define BS_1110		0x0E000000
-#define BS_1111		0x0F000000
-
-#define GPL0_AAAA	0x00000000
-#define GPL0_AAA0	0x00200000
-#define GPL0_AAA1	0x00300000
-#define GPL0_000A	0x00800000
-#define GPL0_0000	0x00A00000
-#define GPL0_0001	0x00B00000
-#define GPL0_111A	0x00C00000
-#define GPL0_1110	0x00E00000
-#define GPL0_1111	0x00F00000
-
-#define GPL1_0000	0x00000000
-#define GPL1_0001	0x00040000
-#define GPL1_1110	0x00080000
-#define GPL1_1111	0x000C0000
-
-#define GPL2_0000	0x00000000
-#define GPL2_0001	0x00010000
-#define GPL2_1110	0x00020000
-#define GPL2_1111	0x00030000
-
-#define GPL3_0000	0x00000000
-#define GPL3_0001	0x00004000
-#define GPL3_1110	0x00008000
-#define GPL3_1111	0x0000C000
-
-#define GPL4_0000	0x00000000
-#define GPL4_0001	0x00001000
-#define GPL4_1110	0x00002000
-#define GPL4_1111	0x00003000
-
-#define GPL5_0000	0x00000000
-#define GPL5_0001	0x00000400
-#define GPL5_1110	0x00000800
-#define GPL5_1111	0x00000C00
-#define LOOP		0x00000080
-
-#define EXEN		0x00000040
-
-#define AMX_COL		0x00000000
-#define AMX_ROW		0x00000020
-#define AMX_MAR		0x00000030
-
-#define NA		0x00000008
-
-#define UTA		0x00000004
-
-#define TODT		0x00000002
-
-#define LAST		0x00000001
-
-#define A10_AAAA	GPL0_AAAA
-#define A10_AAA0	GPL0_AAA0
-#define A10_AAA1	GPL0_AAA1
-#define A10_000A	GPL0_000A
-#define A10_0000	GPL0_0000
-#define A10_0001	GPL0_0001
-#define A10_111A	GPL0_111A
-#define A10_1110	GPL0_1110
-#define A10_1111	GPL0_1111
-
-#define RAS_0000	GPL1_0000
-#define RAS_0001	GPL1_0001
-#define RAS_1110	GPL1_1110
-#define RAS_1111	GPL1_1111
-
-#define CAS_0000	GPL2_0000
-#define CAS_0001	GPL2_0001
-#define CAS_1110	GPL2_1110
-#define CAS_1111	GPL2_1111
-
-#define WE_0000		GPL3_0000
-#define WE_0001		GPL3_0001
-#define WE_1110		GPL3_1110
-#define WE_1111		GPL3_1111
-
-/* #define CAS_LATENCY	3  */
-#define CAS_LATENCY	2
-
-const uint sdram_table[0x40] = {
-
-#if CAS_LATENCY == 3
-	/* RSS */
-	CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_0000 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA,			/* READ  */
-	CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA,			/* PALL  */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST,	/* NOP   */
-	_NOT_USED_, _NOT_USED_,
-
-	/* RBS */
-	CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_0001 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA,			/* READ  */
-	CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP	 */
-	CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP	 */
-	CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL,				/* PALL  */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST,		/* NOP	 */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/* WSS */
-	CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP	 */
-	CS_0000 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL | UTA,			/* WRITE */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA,			/* PALL  */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST,	/* NOP   */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/* WBS */
-	CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL,				/* WRITE */
-	CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1111 | BS_0001 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA,			/* PALL  */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST,	/* NOP   */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_,
-#endif
-
-#if CAS_LATENCY == 2
-	/* RSS */
-	CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_0001 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA,			/* READ  */
-	CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL,				/* NOP   */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST,	/* PALL  */
-	_NOT_USED_,
-	_NOT_USED_, _NOT_USED_,
-
-	/* RBS */
-	CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA,			/* READ  */
-	CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1111 | BS_0001 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL,				/* NOP   */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST,	/* PALL  */
-	_NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/* WSS */
-	CS_0001 | BS_1111 | A10_AAA0 | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL,				/* NOP   */
-	CS_0000 | BS_0001 | A10_0001 | RAS_1110 | CAS_0001 | WE_0000 | AMX_COL | UTA,			/* WRITE */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST,	/* PALL  */
-	_NOT_USED_,
-	_NOT_USED_, _NOT_USED_,
-	_NOT_USED_,
-
-	/* WBS */
-	CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* ACT   */
-	CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL,				/* NOP   */
-	CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0001 | AMX_COL,				/* WRITE */
-	CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,				/* NOP   */
-	CS_1110 | BS_0001 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL | UTA,			/* NOP   */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST,	/* PALL  */
-	_NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_,
-
-#endif
-
-	/* UPT */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_0001 | WE_1111 | AMX_COL | UTA | LOOP,		/* ATRFR */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA,			/* NOP   */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | LOOP,		/* NOP   */
-	CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST,	/* NOP   */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_,
-
-	/* EXC */
-	CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | LAST,
-	_NOT_USED_,
-
-	/* REG */
-	CS_1110 | BS_1111 | A10_1110 | RAS_1110 | CAS_1110 | WE_1110 | AMX_MAR | UTA,
-	CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST,
-};
-
-static const uint nandcs_table[0x40] = {
-	/* RSS */
-	CS_1000 | GPL4_1111 | GPL5_1111 | UTA,
-	CS_0000 | GPL4_1110 | GPL5_1111 | UTA,
-	CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
-	CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
-	CS_0000 | GPL4_0000 | GPL5_1111,
-	CS_0000 | GPL4_0001 | GPL5_1111 | UTA,
-	CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
-	CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST,	/* NOP   */
-
-	/* RBS */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/* WSS */
-	CS_1000 | GPL4_1111 | GPL5_1110 | UTA,
-	CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
-	CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
-	CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
-	CS_0000 | GPL4_1111 | GPL5_0001 | UTA,
-	CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
-	CS_0000 | GPL4_1111 | GPL5_1111,
-	CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST,
-
-	/* WBS */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/* UPT */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_,	_NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_,	_NOT_USED_, _NOT_USED_,
-
-	/* EXC */
-	CS_0001 | LAST,
-	_NOT_USED_,
-
-	/* REG */
-	CS_1110 ,
-	CS_0001 | LAST,
-};
-
-/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
-/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */
-#define MAR_SDRAM_INIT		((CAS_LATENCY << 6) | 0x00000008LU)
-
-/* 9 */
-#define CONFIG_SYS_MAMR	((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
-			 MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |	\
-			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
-
-void check_ram(unsigned int addr, unsigned int size)
-{
-	unsigned int i, j, v, vv;
-	volatile unsigned int *p;
-	unsigned int pv;
-
-	p = (unsigned int *)addr;
-	pv = (unsigned int)p;
-	for (i = 0; i < size / sizeof(unsigned int); i++, pv += sizeof(unsigned int))
-		*p++ = pv;
-
-	p = (unsigned int *)addr;
-	for (i = 0; i < size / sizeof(unsigned int); i++) {
-		v = (unsigned int)p;
-		vv = *p;
-		if (vv != v) {
-			printf("%p: read %08x instead of %08x\n", p, vv, v);
-			hang();
-		}
-		p++;
-	}
-
-	for (j = 0; j < 5; j++) {
-		switch (j) {
-			case 0: v = 0x00000000; break;
-			case 1: v = 0xffffffff; break;
-			case 2: v = 0x55555555; break;
-			case 3: v = 0xaaaaaaaa; break;
-			default:v = 0xdeadbeef; break;
-		}
-		p = (unsigned int *)addr;
-		for (i = 0; i < size / sizeof(unsigned int); i++) {
-			*p = v;
-			vv = *p;
-			if (vv != v) {
-				printf("%p: read %08x instead of %08x\n", p, vv, v);
-				hang();
-			}
-			*p = ~v;
-			p++;
-		}
-	}
-}
-
-#define DO_LOOP do { for (;;) asm volatile ("nop" : : : "memory"); } while(0)
-
-phys_size_t initdram(int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size;
-	u32 d1, d2;
-
-	upmconfig(UPMA, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0]));
-
-	/*
-	 * Preliminary prescaler for refresh
-	 */
-	memctl->memc_mptpr = MPTPR_PTP_DIV8;
-
-	memctl->memc_mar = MAR_SDRAM_INIT;	/* 32-bit address to be output on the address bus if AMX = 0b11 */
-
-	/*
-	 * Map controller bank 3 to the SDRAM bank at preliminary address.
-	 */
-	memctl->memc_or4 = CONFIG_SYS_OR4_PRELIM;
-	memctl->memc_br4 = CONFIG_SYS_BR4_PRELIM;
-
-	memctl->memc_mamr = CONFIG_SYS_MAMR & ~MAMR_PTAE;	/* no refresh yet */
-
-	udelay(200);
-
-	/* perform SDRAM initialisation sequence */
-	memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS4 | MCR_MLCF(1) | MCR_MAD(0x3C);	/* precharge all		*/
-	udelay(1);
-
-	memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS4 | MCR_MLCF(2) | MCR_MAD(0x30);	/* refresh 2 times(0)		*/
-	udelay(1);
-
-	memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS4 | MCR_MLCF(1) | MCR_MAD(0x3E);	/* exception program (write mar)*/
-	udelay(1);
-
-	memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */
-
-	udelay(10000);
-
-
-	d1 = 0xAA55AA55;
-	*(volatile u32 *)0 = d1;
-	d2 = *(volatile u32 *)0;
-	if (d1 != d2) {
-		printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
-		DO_LOOP;
-	}
-
-	d1 = 0x55AA55AA;
-	*(volatile u32 *)0 = d1;
-	d2 = *(volatile u32 *)0;
-	if (d1 != d2) {
-		printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
-		DO_LOOP;
-	}
-
-	d1 = 0x12345678;
-	*(volatile u32 *)0 = d1;
-	d2 = *(volatile u32 *)0;
-	if (d1 != d2) {
-		printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
-		DO_LOOP;
-	}
-
-	size = get_ram_size((long *)0, SDRAM_MAX_SIZE);
-
-	return size;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phys(void)
-{
-	int phyno;
-	unsigned short v;
-
-	udelay(10000);
-	/* reset the damn phys */
-	mii_init();
-
-	for (phyno = 0; phyno < 32; ++phyno) {
-		miiphy_read("FEC", phyno, MII_PHYSID1, &v);
-		if (v == 0xFFFF)
-			continue;
-		miiphy_write("FEC", phyno, MII_BMCR, BMCR_PDOWN);
-		udelay(10000);
-		miiphy_write("FEC", phyno, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
-		udelay(10000);
-	}
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* GP = general purpose, SP = special purpose (on chip peripheral) */
-
-/* bits that can have a special purpose or can be configured as inputs/outputs */
-#define PA_GP_INMASK	_BW(6)
-#define PA_GP_OUTMASK	(_BW(7))
-#define PA_SP_MASK	0
-#define PA_ODR_VAL	0
-#define PA_GP_OUTVAL	(_BW(7))
-#define PA_SP_DIRVAL	0
-
-#define PB_GP_INMASK	0
-#define PB_GP_OUTMASK	(_B(23))
-#define PB_SP_MASK	0
-#define PB_ODR_VAL	0
-#define PB_GP_OUTVAL	(_B(23))
-#define PB_SP_DIRVAL	0
-
-#define PC_GP_INMASK	0
-#define PC_GP_OUTMASK	(_BW(15))
-
-#define PC_SP_MASK	0
-#define PC_SOVAL	0
-#define PC_INTVAL	0
-#define PC_GP_OUTVAL	0
-#define PC_SP_DIRVAL	0
-
-#define PE_GP_INMASK	0
-#define PE_GP_OUTMASK	0
-#define PE_GP_OUTVAL	0
-
-#define PE_SP_MASK	0
-#define PE_ODR_VAL	0
-#define PE_SP_DIRVAL	0
-
-int board_early_init_f(void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile iop8xx_t *ioport = &immap->im_ioport;
-	volatile cpm8xx_t *cpm = &immap->im_cpm;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-
-	(void)ioport;
-	(void)cpm;
-#if 1
-	/* NAND chip select */
-	upmconfig(UPMB, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0]));
-	memctl->memc_or2 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS);
-	memctl->memc_br2 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMB);
-	memctl->memc_mbmr = 0;	/* all clear */
-#endif
-
-	memctl->memc_br5 &= ~BR_V;
-	memctl->memc_br6 &= ~BR_V;
-	memctl->memc_br7 &= ~BR_V;
-
-#if 1
-	ioport->iop_padat	= PA_GP_OUTVAL;
-	ioport->iop_paodr	= PA_ODR_VAL;
-	ioport->iop_padir	= PA_GP_OUTMASK | PA_SP_DIRVAL;
-	ioport->iop_papar	= PA_SP_MASK;
-
-	cpm->cp_pbdat		= PB_GP_OUTVAL;
-	cpm->cp_pbodr		= PB_ODR_VAL;
-	cpm->cp_pbdir		= PB_GP_OUTMASK | PB_SP_DIRVAL;
-	cpm->cp_pbpar		= PB_SP_MASK;
-
-	ioport->iop_pcdat	= PC_GP_OUTVAL;
-	ioport->iop_pcdir	= PC_GP_OUTMASK | PC_SP_DIRVAL;
-	ioport->iop_pcso	= PC_SOVAL;
-	ioport->iop_pcint	= PC_INTVAL;
-	ioport->iop_pcpar	= PC_SP_MASK;
-
-	cpm->cp_pedat		= PE_GP_OUTVAL;
-	cpm->cp_peodr		= PE_ODR_VAL;
-	cpm->cp_pedir		= PE_GP_OUTMASK | PE_SP_DIRVAL;
-	cpm->cp_pepar		= PE_SP_MASK;
-#endif
-
-	return 0;
-}
-
-#ifdef CONFIG_HW_WATCHDOG
-
-void hw_watchdog_reset(void)
-{
-	/* XXX add here the really funky stuff */
-}
-
-#endif
-
-#if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE)
-int overwrite_console(void)
-{
-	/* printf("overwrite_console called\n"); */
-	return 0;
-}
-#endif
-
-extern int drv_phone_init(void);
-extern int drv_phone_use_me(void);
-extern int drv_phone_is_idle(void);
-
-int misc_init_r(void)
-{
-	return 0;
-}
-
-int last_stage_init(void)
-{
-	reset_phys();
-
-	return 0;
-}
diff --git a/board/stx/stxxtc/u-boot.lds b/board/stx/stxxtc/u-boot.lds
deleted file mode 100644
index 0dff5a4..0000000
--- a/board/stx/stxxtc/u-boot.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text	:
-  {
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    KEEP(*(.got))
-    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/stx/stxxtc/u-boot.lds.debug b/board/stx/stxxtc/u-boot.lds.debug
deleted file mode 100644
index a198cf9..0000000
--- a/board/stx/stxxtc/u-boot.lds.debug
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o		(.text)
-    common/dlmalloc.o		(.text)
-    lib/vsprintf.o	(.text)
-    lib/crc32.o		(.text)
-
-    . = env_offset;
-    common/env_embedded.o(.text)
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/boards.cfg b/boards.cfg
index dc7ae48..eb04251 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -1179,7 +1179,6 @@ Orphan  powerpc     mpc8xx         -           -               gen860t
 Orphan  powerpc     mpc8xx         -           -               gen860t             GEN860T_SC                            GEN860T:SC                                                                                                                        Keith Outwater Keith_Outwater@mvis.com
 Orphan  powerpc     mpc8xx         -           -               sixnet              SXNI855T                              -                                                                                                                                 Dave Ellis DGE@sixnetio.com
 Orphan  powerpc     mpc8xx         -           -               svm_sc8xx           svm_sc8xx                             -                                                                                                                                 John Zhan zhanz@sinovee.com
-Orphan  powerpc     mpc8xx         -           stx             stxxtc              stxxtc                                -                                                                                                                                 Dan Malek dan@embeddedalley.com
 # The following were moved to "Orphan" in April, 2014
 Orphan  powerpc     74xx_7xx       -           -               evb64260            ZUMA                                  -                                                                                                                                 Nye Liu nyet@zumanetworks.com
 # The following were moved to "Orphan" in March, 2014
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 160e385..df0b27b 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+stxxtc           powerpc     mpc8xx         -           -           Dan Malek dan@embeddedalley.com
 musenki          powerpc     mpc824x        -           -           Jim Thompson jim@musenki.com
 ppmc8260         powerpc     mpc8260        -           -           Brad Kemp Brad.Kemp@seranoa.com
 spc1920          powerpc     mpc8xx         98ad54be    2014-07-07
diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h
index 21a3ef4..898d542 100644
--- a/drivers/serial/usbtty.h
+++ b/drivers/serial/usbtty.h
@@ -12,9 +12,7 @@
 #define __USB_TTY_H__
#include <usbdevice.h>
-#if defined(CONFIG_PPC)
-#include <usb/mpc8xx_udc.h>
-#elif defined(CONFIG_OMAP1510)
+#if defined(CONFIG_OMAP1510)
 #include <usb/omap1510_udc.h>
 #elif defined(CONFIG_CPU_PXA27X)
 #include <usb/pxa27x_udc.h>
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 66becdc..9604eff 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -33,7 +33,6 @@ obj-y += ep0.o
 obj-$(CONFIG_DW_UDC) += designware_udc.o
 obj-$(CONFIG_OMAP1510) += omap1510_udc.o
 obj-$(CONFIG_OMAP1610) += omap1510_udc.o
-obj-$(CONFIG_MPC885_FAMILY) += mpc8xx_udc.o
 obj-$(CONFIG_CPU_PXA27X) += pxa27x_udc.o
 endif
 endif
diff --git a/drivers/usb/gadget/mpc8xx_udc.c b/drivers/usb/gadget/mpc8xx_udc.c
deleted file mode 100644
index 7f72972..0000000
--- a/drivers/usb/gadget/mpc8xx_udc.c
+++ /dev/null
@@ -1,1386 +0,0 @@
-/*
- * Copyright (C) 2006 by Bryan O'Donoghue, CodeHermit
- * bodonoghue@CodeHermit.ie
- *
- * References
- * DasUBoot/drivers/usb/gadget/omap1510_udc.c, for design and implementation
- * ideas.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * Notes :
- * 1.	#define __SIMULATE_ERROR__ to inject a CRC error into every 2nd TX
- *		packet to force the USB re-transmit protocol.
- *
- * 2.	#define __DEBUG_UDC__ to switch on debug tracing to serial console
- *	be careful that tracing doesn't create Hiesen-bugs with respect to
- *	response timeouts to control requests.
- *
- * 3.	This driver should be able to support any higher level driver that
- *	that wants to do either of the two standard UDC implementations
- *	Control-Bulk-Interrupt or  Bulk-IN/Bulk-Out standards. Hence
- *	gserial and cdc_acm should work with this code.
- *
- * 4.	NAK events never actually get raised at all, the documentation
- *	is just wrong !
- *
- * 5.	For some reason, cbd_datlen is *always* +2 the value it should be.
- *	this means that having an RX cbd of 16 bytes is not possible, since
- *	the same size is reported for 14 bytes received as 16 bytes received
- *	until we can find out why this happens, RX cbds must be limited to 8
- *	bytes. TODO: check errata for this behaviour.
- *
- * 6.	Right now this code doesn't support properly powering up with the USB
- *	cable attached to the USB host my development board the Adder87x doesn't
- *	have a pull-up fitted to allow this, so it is necessary to power the
- *	board and *then* attached the USB cable to the host. However somebody
- *	with a different design in their board may be able to keep the cable
- *	constantly connected and simply enable/disable a pull-up  re
- *	figure 31.1 in MPC885RM.pdf instead of having to power up the board and
- *	then attach the cable !
- *
- */
-#include <common.h>
-#include <config.h>
-#include <commproc.h>
-#include <usbdevice.h>
-#include <usb/mpc8xx_udc.h>
-#include <usb/udc.h>
-
-#include "ep0.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define ERR(fmt, args...)\
-	serial_printf("ERROR : [%s] %s:%d: "fmt,\
-				__FILE__,__FUNCTION__,__LINE__, ##args)
-#ifdef __DEBUG_UDC__
-#define DBG(fmt,args...)\
-		serial_printf("[%s] %s:%d: "fmt,\
-				__FILE__,__FUNCTION__,__LINE__, ##args)
-#else
-#define DBG(fmt,args...)
-#endif
-
-/* Static Data */
-#ifdef __SIMULATE_ERROR__
-static char err_poison_test = 0;
-#endif
-static struct mpc8xx_ep ep_ref[MAX_ENDPOINTS];
-static u32 address_base = STATE_NOT_READY;
-static mpc8xx_udc_state_t udc_state = 0;
-static struct usb_device_instance *udc_device = 0;
-static volatile usb_epb_t *endpoints[MAX_ENDPOINTS];
-static volatile cbd_t *tx_cbd[TX_RING_SIZE];
-static volatile cbd_t *rx_cbd[RX_RING_SIZE];
-static volatile immap_t *immr = 0;
-static volatile cpm8xx_t *cp = 0;
-static volatile usb_pram_t *usb_paramp = 0;
-static volatile usb_t *usbp = 0;
-static int rx_ct = 0;
-static int tx_ct = 0;
-
-/* Static Function Declarations */
-static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
-					    usb_device_state_t final);
-static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
-					      usb_device_state_t final);
-static void mpc8xx_udc_stall (unsigned int ep);
-static void mpc8xx_udc_flush_tx_fifo (int epid);
-static void mpc8xx_udc_flush_rx_fifo (void);
-static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp);
-static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
-				struct urb *tx_urb);
-static void mpc8xx_udc_dump_request (struct usb_device_request *request);
-static void mpc8xx_udc_clock_init (volatile immap_t * immr,
-				   volatile cpm8xx_t * cp);
-static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi);
-static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp);
-static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp);
-static void mpc8xx_udc_cbd_init (void);
-static void mpc8xx_udc_endpoint_init (void);
-static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size);
-static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment);
-static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp);
-static void mpc8xx_udc_set_nak (unsigned int ep);
-static short mpc8xx_udc_handle_txerr (void);
-static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid);
-
-/******************************************************************************
-			       Global Linkage
- *****************************************************************************/
-
-/* udc_init
- *
- * Do initial bus gluing
- */
-int udc_init (void)
-{
-	/* Init various pointers */
-	immr = (immap_t *) CONFIG_SYS_IMMR;
-	cp = (cpm8xx_t *) & (immr->im_cpm);
-	usb_paramp = (usb_pram_t *) & (cp->cp_dparam[PROFF_USB]);
-	usbp = (usb_t *) & (cp->cp_scc[0]);
-
-	memset (ep_ref, 0x00, (sizeof (struct mpc8xx_ep) * MAX_ENDPOINTS));
-
-	udc_device = 0;
-	udc_state = STATE_NOT_READY;
-
-	usbp->usmod = 0x00;
-	usbp->uscom = 0;
-
-	/* Set USB Frame #0, Respond at Address & Get a clock source  */
-	usbp->usaddr = 0x00;
-	mpc8xx_udc_clock_init (immr, cp);
-
-	/* PA15, PA14 as perhiperal USBRXD and USBOE */
-	immr->im_ioport.iop_padir &= ~0x0003;
-	immr->im_ioport.iop_papar |= 0x0003;
-
-	/* PC11/PC10 as peripheral USBRXP USBRXN */
-	immr->im_ioport.iop_pcso |= 0x0030;
-
-	/* PC7/PC6 as perhiperal USBTXP and USBTXN */
-	immr->im_ioport.iop_pcdir |= 0x0300;
-	immr->im_ioport.iop_pcpar |= 0x0300;
-
-	/* Set the base address */
-	address_base = (u32) (cp->cp_dpmem + CPM_USB_BASE);
-
-	/* Initialise endpoints and circular buffers */
-	mpc8xx_udc_endpoint_init ();
-	mpc8xx_udc_cbd_init ();
-
-	/* Assign allocated Dual Port Endpoint descriptors */
-	usb_paramp->ep0ptr = (u32) endpoints[0];
-	usb_paramp->ep1ptr = (u32) endpoints[1];
-	usb_paramp->ep2ptr = (u32) endpoints[2];
-	usb_paramp->ep3ptr = (u32) endpoints[3];
-	usb_paramp->frame_n = 0;
-
-	DBG ("ep0ptr=0x%08x ep1ptr=0x%08x ep2ptr=0x%08x ep3ptr=0x%08x\n",
-	     usb_paramp->ep0ptr, usb_paramp->ep1ptr, usb_paramp->ep2ptr,
-	     usb_paramp->ep3ptr);
-
-	return 0;
-}
-
-/* udc_irq
- *
- * Poll for whatever events may have occured
- */
-void udc_irq (void)
-{
-	int epid = 0;
-	volatile cbd_t *rx_cbdp = 0;
-	volatile cbd_t *rx_cbdp_base = 0;
-
-	if (udc_state != STATE_READY) {
-		return;
-	}
-
-	if (usbp->usber & USB_E_BSY) {
-		/* This shouldn't happen. If it does then it's a bug ! */
-		usbp->usber |= USB_E_BSY;
-		mpc8xx_udc_flush_rx_fifo ();
-	}
-
-	/* Scan all RX/Bidirectional Endpoints for RX data. */
-	for (epid = 0; epid < MAX_ENDPOINTS; epid++) {
-		if (!ep_ref[epid].prx) {
-			continue;
-		}
-		rx_cbdp = rx_cbdp_base = ep_ref[epid].prx;
-
-		do {
-			if (!(rx_cbdp->cbd_sc & RX_BD_E)) {
-
-				if (rx_cbdp->cbd_sc & 0x1F) {
-					/* Corrupt data discard it.
-					 * Controller has NAK'd this packet.
-					 */
-					mpc8xx_udc_clear_rxbd (rx_cbdp);
-
-				} else {
-					if (!epid) {
-						mpc8xx_udc_ep0_rx (rx_cbdp);
-
-					} else {
-						/* Process data */
-						mpc8xx_udc_set_nak (epid);
-						mpc8xx_udc_epn_rx (epid, rx_cbdp);
-						mpc8xx_udc_clear_rxbd (rx_cbdp);
-					}
-				}
-
-				/* Advance RX CBD pointer */
-				mpc8xx_udc_advance_rx (&rx_cbdp, epid);
-				ep_ref[epid].prx = rx_cbdp;
-			} else {
-				/* Advance RX CBD pointer */
-				mpc8xx_udc_advance_rx (&rx_cbdp, epid);
-			}
-
-		} while (rx_cbdp != rx_cbdp_base);
-	}
-
-	/* Handle TX events as appropiate, the correct place to do this is
-	 * in a tx routine. Perhaps TX on epn was pre-empted by ep0
-	 */
-
-	if (usbp->usber & USB_E_TXB) {
-		usbp->usber |= USB_E_TXB;
-	}
-
-	if (usbp->usber & (USB_TX_ERRMASK)) {
-		mpc8xx_udc_handle_txerr ();
-	}
-
-	/* Switch to the default state, respond at the default address */
-	if (usbp->usber & USB_E_RESET) {
-		usbp->usber |= USB_E_RESET;
-		usbp->usaddr = 0x00;
-		udc_device->device_state = STATE_DEFAULT;
-	}
-
-	/* if(usbp->usber&USB_E_IDLE){
-	   We could suspend here !
-	   usbp->usber|=USB_E_IDLE;
-	   DBG("idle state change\n");
-	   }
-	   if(usbp->usbs){
-	   We could resume here when IDLE is deasserted !
-	   Not worth doing, so long as we are self powered though.
-	   }
-	*/
-
-	return;
-}
-
-/* udc_endpoint_write
- *
- * Write some data to an endpoint
- */
-int udc_endpoint_write (struct usb_endpoint_instance *epi)
-{
-	int ep = 0;
-	short epid = 1, unnak = 0, ret = 0;
-
-	if (udc_state != STATE_READY) {
-		ERR ("invalid udc_state != STATE_READY!\n");
-		return -1;
-	}
-
-	if (!udc_device || !epi) {
-		return -1;
-	}
-
-	if (udc_device->device_state != STATE_CONFIGURED) {
-		return -1;
-	}
-
-	ep = epi->endpoint_address & 0x03;
-	if (ep >= MAX_ENDPOINTS) {
-		return -1;
-	}
-
-	/* Set NAK for all RX endpoints during TX */
-	for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
-
-		/* Don't set NAK on DATA IN/CONTROL endpoints */
-		if (ep_ref[epid].sc & USB_DIR_IN) {
-			continue;
-		}
-
-		if (!(usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK))) {
-			unnak |= 1 << epid;
-		}
-
-		mpc8xx_udc_set_nak (epid);
-	}
-
-	mpc8xx_udc_init_tx (&udc_device->bus->endpoint_array[ep],
-			    epi->tx_urb);
-	ret = mpc8xx_udc_ep_tx (&udc_device->bus->endpoint_array[ep]);
-
-	/* Remove temporary NAK */
-	for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
-		if (unnak & (1 << epid)) {
-			udc_unset_nak (epid);
-		}
-	}
-
-	return ret;
-}
-
-/* mpc8xx_udc_assign_urb
- *
- * Associate a given urb to an endpoint TX or RX transmit/receive buffers
- */
-static int mpc8xx_udc_assign_urb (int ep, char direction)
-{
-	struct usb_endpoint_instance *epi = 0;
-
-	if (ep >= MAX_ENDPOINTS) {
-		goto err;
-	}
-	epi = &udc_device->bus->endpoint_array[ep];
-	if (!epi) {
-		goto err;
-	}
-
-	if (!ep_ref[ep].urb) {
-		ep_ref[ep].urb = usbd_alloc_urb (udc_device, udc_device->bus->endpoint_array);
-		if (!ep_ref[ep].urb) {
-			goto err;
-		}
-	} else {
-		ep_ref[ep].urb->actual_length = 0;
-	}
-
-	switch (direction) {
-	case USB_DIR_IN:
-		epi->tx_urb = ep_ref[ep].urb;
-		break;
-	case USB_DIR_OUT:
-		epi->rcv_urb = ep_ref[ep].urb;
-		break;
-	default:
-		goto err;
-	}
-	return 0;
-
-      err:
-	udc_state = STATE_ERROR;
-	return -1;
-}
-
-/* udc_setup_ep
- *
- * Associate U-Boot software endpoints to mpc8xx endpoint parameter ram
- * Isochronous endpoints aren't yet supported!
- */
-void udc_setup_ep (struct usb_device_instance *device, unsigned int ep,
-		   struct usb_endpoint_instance *epi)
-{
-	uchar direction = 0;
-	int ep_attrib = 0;
-
-	if (epi && (ep < MAX_ENDPOINTS)) {
-
-		if (ep == 0) {
-			if (epi->rcv_attributes != USB_ENDPOINT_XFER_CONTROL
-			    || epi->tx_attributes !=
-			    USB_ENDPOINT_XFER_CONTROL) {
-
-				/* ep0 must be a control endpoint */
-				udc_state = STATE_ERROR;
-				return;
-
-			}
-			if (!(ep_ref[ep].sc & EP_ATTACHED)) {
-				mpc8xx_udc_cbd_attach (ep, epi->tx_packetSize,
-						       epi->rcv_packetSize);
-			}
-			usbp->usep[ep] = 0x0000;
-			return;
-		}
-
-		if ((epi->endpoint_address & USB_ENDPOINT_DIR_MASK)
-		    == USB_DIR_IN) {
-
-			direction = 1;
-			ep_attrib = epi->tx_attributes;
-			epi->rcv_packetSize = 0;
-			ep_ref[ep].sc |= USB_DIR_IN;
-		} else {
-
-			direction = 0;
-			ep_attrib = epi->rcv_attributes;
-			epi->tx_packetSize = 0;
-			ep_ref[ep].sc &= ~USB_DIR_IN;
-		}
-
-		if (mpc8xx_udc_assign_urb (ep, epi->endpoint_address
-					   & USB_ENDPOINT_DIR_MASK)) {
-			return;
-		}
-
-		switch (ep_attrib) {
-		case USB_ENDPOINT_XFER_CONTROL:
-			if (!(ep_ref[ep].sc & EP_ATTACHED)) {
-				mpc8xx_udc_cbd_attach (ep,
-						       epi->tx_packetSize,
-						       epi->rcv_packetSize);
-			}
-			usbp->usep[ep] = ep << 12;
-			epi->rcv_urb = epi->tx_urb = ep_ref[ep].urb;
-
-			break;
-		case USB_ENDPOINT_XFER_BULK:
-		case USB_ENDPOINT_XFER_INT:
-			if (!(ep_ref[ep].sc & EP_ATTACHED)) {
-				if (direction) {
-					mpc8xx_udc_cbd_attach (ep,
-							       epi->tx_packetSize,
-							       0);
-				} else {
-					mpc8xx_udc_cbd_attach (ep,
-							       0,
-							       epi->rcv_packetSize);
-				}
-			}
-			usbp->usep[ep] = (ep << 12) | ((ep_attrib) << 8);
-
-			break;
-		case USB_ENDPOINT_XFER_ISOC:
-		default:
-			serial_printf ("Error endpoint attrib %d>3\n", ep_attrib);
-			udc_state = STATE_ERROR;
-			break;
-		}
-	}
-
-}
-
-/* udc_connect
- *
- * Move state, switch on the USB
- */
-void udc_connect (void)
-{
-	/* Enable pull-up resistor on D+
-	 * TODO: fit a pull-up resistor to drive SE0 for > 2.5us
-	 */
-
-	if (udc_state != STATE_ERROR) {
-		udc_state = STATE_READY;
-		usbp->usmod |= USMOD_EN;
-	}
-}
-
-/* udc_disconnect
- *
- * Disconnect is not used but, is included for completeness
- */
-void udc_disconnect (void)
-{
-	/* Disable pull-up resistor on D-
-	 * TODO: fix a pullup resistor to control this
-	 */
-
-	if (udc_state != STATE_ERROR) {
-		udc_state = STATE_NOT_READY;
-	}
-	usbp->usmod &= ~USMOD_EN;
-}
-
-/* udc_enable
- *
- * Grab an EP0 URB, register interest in a subset of USB events
- */
-void udc_enable (struct usb_device_instance *device)
-{
-	if (udc_state == STATE_ERROR) {
-		return;
-	}
-
-	udc_device = device;
-
-	if (!ep_ref[0].urb) {
-		ep_ref[0].urb = usbd_alloc_urb (device, device->bus->endpoint_array);
-	}
-
-	/* Register interest in all events except SOF, enable transceiver */
-	usbp->usber = 0x03FF;
-	usbp->usbmr = 0x02F7;
-
-	return;
-}
-
-/* udc_disable
- *
- * disable the currently hooked device
- */
-void udc_disable (void)
-{
-	int i = 0;
-
-	if (udc_state == STATE_ERROR) {
-		DBG ("Won't disable UDC. udc_state==STATE_ERROR !\n");
-		return;
-	}
-
-	udc_device = 0;
-
-	for (; i < MAX_ENDPOINTS; i++) {
-		if (ep_ref[i].urb) {
-			usbd_dealloc_urb (ep_ref[i].urb);
-			ep_ref[i].urb = 0;
-		}
-	}
-
-	usbp->usbmr = 0x00;
-	usbp->usmod = ~USMOD_EN;
-	udc_state = STATE_NOT_READY;
-}
-
-/* udc_startup_events
- *
- * Enable the specified device
- */
-void udc_startup_events (struct usb_device_instance *device)
-{
-	udc_enable (device);
-	if (udc_state == STATE_READY) {
-		usbd_device_event_irq (device, DEVICE_CREATE, 0);
-	}
-}
-
-/* udc_set_nak
- *
- * Allow upper layers to signal lower layers should not accept more RX data
- *
- */
-void udc_set_nak (int epid)
-{
-	if (epid) {
-		mpc8xx_udc_set_nak (epid);
-	}
-}
-
-/* udc_unset_nak
- *
- * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
- * Switch off NAKing on this endpoint to accept more data output from host.
- *
- */
-void udc_unset_nak (int epid)
-{
-	if (epid > MAX_ENDPOINTS) {
-		return;
-	}
-
-	if (usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK)) {
-		usbp->usep[epid] &= ~(USEP_THS_NAK | USEP_RHS_NAK);
-		__asm__ ("eieio");
-	}
-}
-
-/******************************************************************************
-			      Static Linkage
-******************************************************************************/
-
-/* udc_state_transition_up
- * udc_state_transition_down
- *
- * Helper functions to implement device state changes.	The device states and
- * the events that transition between them are:
- *
- *				STATE_ATTACHED
- *				||	/\
- *				/	||
- *	DEVICE_HUB_CONFIGURED			DEVICE_HUB_RESET
- *				||	/\
- *				/	||
- *				STATE_POWERED
- *				||	/\
- *				/	||
- *	DEVICE_RESET				DEVICE_POWER_INTERRUPTION
- *				||	/\
- *				/	||
- *				STATE_DEFAULT
- *				||	/\
- *				/	||
- *	DEVICE_ADDRESS_ASSIGNED			DEVICE_RESET
- *				||	/\
- *				/	||
- *				STATE_ADDRESSED
- *				||	/\
- *				/	||
- *	DEVICE_CONFIGURED			DEVICE_DE_CONFIGURED
- *				||	/\
- *				/	||
- *				STATE_CONFIGURED
- *
- * udc_state_transition_up transitions up (in the direction from STATE_ATTACHED
- * to STATE_CONFIGURED) from the specified initial state to the specified final
- * state, passing through each intermediate state on the way.  If the initial
- * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then
- * no state transitions will take place.
- *
- * udc_state_transition_down transitions down (in the direction from
- * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the
- * specified final state, passing through each intermediate state on the way.
- * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final
- * state, then no state transitions will take place.
- *
- */
-
-static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
-					    usb_device_state_t final)
-{
-	if (initial < final) {
-		switch (initial) {
-		case STATE_ATTACHED:
-			usbd_device_event_irq (udc_device,
-					       DEVICE_HUB_CONFIGURED, 0);
-			if (final == STATE_POWERED)
-				break;
-		case STATE_POWERED:
-			usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
-			if (final == STATE_DEFAULT)
-				break;
-		case STATE_DEFAULT:
-			usbd_device_event_irq (udc_device,
-					       DEVICE_ADDRESS_ASSIGNED, 0);
-			if (final == STATE_ADDRESSED)
-				break;
-		case STATE_ADDRESSED:
-			usbd_device_event_irq (udc_device, DEVICE_CONFIGURED,
-					       0);
-		case STATE_CONFIGURED:
-			break;
-		default:
-			break;
-		}
-	}
-}
-
-static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
-					      usb_device_state_t final)
-{
-	if (initial > final) {
-		switch (initial) {
-		case STATE_CONFIGURED:
-			usbd_device_event_irq (udc_device,
-					       DEVICE_DE_CONFIGURED, 0);
-			if (final == STATE_ADDRESSED)
-				break;
-		case STATE_ADDRESSED:
-			usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
-			if (final == STATE_DEFAULT)
-				break;
-		case STATE_DEFAULT:
-			usbd_device_event_irq (udc_device,
-					       DEVICE_POWER_INTERRUPTION, 0);
-			if (final == STATE_POWERED)
-				break;
-		case STATE_POWERED:
-			usbd_device_event_irq (udc_device, DEVICE_HUB_RESET,
-					       0);
-		case STATE_ATTACHED:
-			break;
-		default:
-			break;
-		}
-	}
-}
-
-/* mpc8xx_udc_stall
- *
- * Force returning of STALL tokens on the given endpoint. Protocol or function
- * STALL conditions are permissable here
- */
-static void mpc8xx_udc_stall (unsigned int ep)
-{
-	usbp->usep[ep] |= STALL_BITMASK;
-}
-
-/* mpc8xx_udc_set_nak
- *
- * Force returning of NAK responses for the given endpoint as a kind of very
- * simple flow control
- */
-static void mpc8xx_udc_set_nak (unsigned int ep)
-{
-	usbp->usep[ep] |= NAK_BITMASK;
-	__asm__ ("eieio");
-}
-
-/* mpc8xx_udc_handle_txerr
- *
- * Handle errors relevant to TX. Return a status code to allow calling
- * indicative of what if anything happened
- */
-static short mpc8xx_udc_handle_txerr ()
-{
-	short ep = 0, ret = 0;
-
-	for (; ep < TX_RING_SIZE; ep++) {
-		if (usbp->usber & (0x10 << ep)) {
-
-			/* Timeout or underrun */
-			if (tx_cbd[ep]->cbd_sc & 0x06) {
-				ret = 1;
-				mpc8xx_udc_flush_tx_fifo (ep);
-
-			} else {
-				if (usbp->usep[ep] & STALL_BITMASK) {
-					if (!ep) {
-						usbp->usep[ep] &= ~STALL_BITMASK;
-					}
-				}	/* else NAK */
-			}
-			usbp->usber |= (0x10 << ep);
-		}
-	}
-	return ret;
-}
-
-/* mpc8xx_udc_advance_rx
- *
- * Advance cbd rx
- */
-static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid)
-{
-	if ((*rx_cbdp)->cbd_sc & RX_BD_W) {
-		*rx_cbdp = (volatile cbd_t *) (endpoints[epid]->rbase + CONFIG_SYS_IMMR);
-
-	} else {
-		(*rx_cbdp)++;
-	}
-}
-
-
-/* mpc8xx_udc_flush_tx_fifo
- *
- * Flush a given TX fifo. Assumes one tx cbd per endpoint
- */
-static void mpc8xx_udc_flush_tx_fifo (int epid)
-{
-	volatile cbd_t *tx_cbdp = 0;
-
-	if (epid > MAX_ENDPOINTS) {
-		return;
-	}
-
-	/* TX stop */
-	immr->im_cpm.cp_cpcr = ((epid << 2) | 0x1D01);
-	__asm__ ("eieio");
-	while (immr->im_cpm.cp_cpcr & 0x01);
-
-	usbp->uscom = 0x40 | 0;
-
-	/* reset ring */
-	tx_cbdp = (cbd_t *) (endpoints[epid]->tbptr + CONFIG_SYS_IMMR);
-	tx_cbdp->cbd_sc = (TX_BD_I | TX_BD_W);
-
-
-	endpoints[epid]->tptr = endpoints[epid]->tbase;
-	endpoints[epid]->tstate = 0x00;
-	endpoints[epid]->tbcnt = 0x00;
-
-	/* TX start */
-	immr->im_cpm.cp_cpcr = ((epid << 2) | 0x2D01);
-	__asm__ ("eieio");
-	while (immr->im_cpm.cp_cpcr & 0x01);
-
-	return;
-}
-
-/* mpc8xx_udc_flush_rx_fifo
- *
- * For the sake of completeness of the namespace, it seems like
- * a good-design-decision (tm) to include mpc8xx_udc_flush_rx_fifo();
- * If RX_BD_E is true => a driver bug either here or in an upper layer
- * not polling frequently enough. If RX_BD_E is true we have told the host
- * we have accepted data but, the CPM found it had no-where to put that data
- * which needless to say would be a bad thing.
- */
-static void mpc8xx_udc_flush_rx_fifo ()
-{
-	int i = 0;
-
-	for (i = 0; i < RX_RING_SIZE; i++) {
-		if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
-			ERR ("buf %p used rx data len = 0x%x sc=0x%x!\n",
-			     rx_cbd[i], rx_cbd[i]->cbd_datlen,
-			     rx_cbd[i]->cbd_sc);
-
-		}
-	}
-	ERR ("BUG : Input over-run\n");
-}
-
-/* mpc8xx_udc_clear_rxbd
- *
- * Release control of RX CBD to CP.
- */
-static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp)
-{
-	rx_cbdp->cbd_datlen = 0x0000;
-	rx_cbdp->cbd_sc = ((rx_cbdp->cbd_sc & RX_BD_W) | (RX_BD_E | RX_BD_I));
-	__asm__ ("eieio");
-}
-
-/* mpc8xx_udc_tx_irq
- *
- * Parse for tx timeout, control RX or USB reset/busy conditions
- * Return -1 on timeout, -2 on fatal error, else return zero
- */
-static int mpc8xx_udc_tx_irq (int ep)
-{
-	int i = 0;
-
-	if (usbp->usber & (USB_TX_ERRMASK)) {
-		if (mpc8xx_udc_handle_txerr ()) {
-			/* Timeout, controlling function must retry send */
-			return -1;
-		}
-	}
-
-	if (usbp->usber & (USB_E_RESET | USB_E_BSY)) {
-		/* Fatal, abandon TX transaction */
-		return -2;
-	}
-
-	if (usbp->usber & USB_E_RXB) {
-		for (i = 0; i < RX_RING_SIZE; i++) {
-			if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
-				if ((rx_cbd[i] == ep_ref[0].prx) || ep) {
-					return -2;
-				}
-			}
-		}
-	}
-
-	return 0;
-}
-
-/* mpc8xx_udc_ep_tx
- *
- * Transmit in a re-entrant fashion outbound USB packets.
- * Implement retry/timeout mechanism described in USB specification
- * Toggle DATA0/DATA1 pids as necessary
- * Introduces non-standard tx_retry. The USB standard has no scope for slave
- * devices to give up TX, however tx_retry stops us getting stuck in an endless
- * TX loop.
- */
-static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi)
-{
-	struct urb *urb = epi->tx_urb;
-	volatile cbd_t *tx_cbdp = 0;
-	unsigned int ep = 0, pkt_len = 0, x = 0, tx_retry = 0;
-	int ret = 0;
-
-	if (!epi || (epi->endpoint_address & 0x03) >= MAX_ENDPOINTS || !urb) {
-		return -1;
-	}
-
-	ep = epi->endpoint_address & 0x03;
-	tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR);
-
-	if (tx_cbdp->cbd_sc & TX_BD_R || usbp->usber & USB_E_TXB) {
-		mpc8xx_udc_flush_tx_fifo (ep);
-		usbp->usber |= USB_E_TXB;
-	};
-
-	while (tx_retry++ < 100) {
-		ret = mpc8xx_udc_tx_irq (ep);
-		if (ret == -1) {
-			/* ignore timeout here */
-		} else if (ret == -2) {
-			/* Abandon TX */
-			mpc8xx_udc_flush_tx_fifo (ep);
-			return -1;
-		}
-
-		tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CONFIG_SYS_IMMR);
-		while (tx_cbdp->cbd_sc & TX_BD_R) {
-		};
-		tx_cbdp->cbd_sc = (tx_cbdp->cbd_sc & TX_BD_W);
-
-		pkt_len = urb->actual_length - epi->sent;
-
-		if (pkt_len > epi->tx_packetSize || pkt_len > EP_MAX_PKT) {
-			pkt_len = MIN (epi->tx_packetSize, EP_MAX_PKT);
-		}
-
-		for (x = 0; x < pkt_len; x++) {
-			*((unsigned char *) (tx_cbdp->cbd_bufaddr + x)) =
-				urb->buffer[epi->sent + x];
-		}
-		tx_cbdp->cbd_datlen = pkt_len;
-		tx_cbdp->cbd_sc |= (CBD_TX_BITMASK | ep_ref[ep].pid);
-		__asm__ ("eieio");
-
-#ifdef __SIMULATE_ERROR__
-		if (++err_poison_test == 2) {
-			err_poison_test = 0;
-			tx_cbdp->cbd_sc &= ~TX_BD_TC;
-		}
-#endif
-
-		usbp->uscom = (USCOM_STR | ep);
-
-		while (!(usbp->usber & USB_E_TXB)) {
-			ret = mpc8xx_udc_tx_irq (ep);
-			if (ret == -1) {
-				/* TX timeout */
-				break;
-			} else if (ret == -2) {
-				if (usbp->usber & USB_E_TXB) {
-					usbp->usber |= USB_E_TXB;
-				}
-				mpc8xx_udc_flush_tx_fifo (ep);
-				return -1;
-			}
-		};
-
-		if (usbp->usber & USB_E_TXB) {
-			usbp->usber |= USB_E_TXB;
-		}
-
-		/* ACK must be present <= 18bit times from TX */
-		if (ret == -1) {
-			continue;
-		}
-
-		/* TX ACK : USB 2.0 8.7.2, Toggle PID, Advance TX */
-		epi->sent += pkt_len;
-		epi->last = MIN (urb->actual_length - epi->sent, epi->tx_packetSize);
-		TOGGLE_TX_PID (ep_ref[ep].pid);
-
-		if (epi->sent >= epi->tx_urb->actual_length) {
-
-			epi->tx_urb->actual_length = 0;
-			epi->sent = 0;
-
-			if (ep_ref[ep].sc & EP_SEND_ZLP) {
-				ep_ref[ep].sc &= ~EP_SEND_ZLP;
-			} else {
-				return 0;
-			}
-		}
-	}
-
-	ERR ("TX fail, endpoint 0x%x tx bytes 0x%x/0x%x\n", ep, epi->sent,
-	     epi->tx_urb->actual_length);
-
-	return -1;
-}
-
-/* mpc8xx_udc_dump_request
- *
- * Dump a control request to console
- */
-static void mpc8xx_udc_dump_request (struct usb_device_request *request)
-{
-	DBG ("bmRequestType:%02x bRequest:%02x wValue:%04x "
-	     "wIndex:%04x wLength:%04x ?\n",
-	     request->bmRequestType,
-	     request->bRequest,
-	     request->wValue, request->wIndex, request->wLength);
-
-	return;
-}
-
-/* mpc8xx_udc_ep0_rx_setup
- *
- * Decode received ep0 SETUP packet. return non-zero on error
- */
-static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp)
-{
-	unsigned int x = 0;
-	struct urb *purb = ep_ref[0].urb;
-	struct usb_endpoint_instance *epi =
-		&udc_device->bus->endpoint_array[0];
-
-	for (; x < rx_cbdp->cbd_datlen; x++) {
-		*(((unsigned char *) &ep_ref[0].urb->device_request) + x) =
-			*((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
-	}
-
-	mpc8xx_udc_clear_rxbd (rx_cbdp);
-
-	if (ep0_recv_setup (purb)) {
-		mpc8xx_udc_dump_request (&purb->device_request);
-		return -1;
-	}
-
-	if ((purb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK)
-	    == USB_REQ_HOST2DEVICE) {
-
-		switch (purb->device_request.bRequest) {
-		case USB_REQ_SET_ADDRESS:
-			/* Send the Status OUT ZLP */
-			ep_ref[0].pid = TX_BD_PID_DATA1;
-			purb->actual_length = 0;
-			mpc8xx_udc_init_tx (epi, purb);
-			mpc8xx_udc_ep_tx (epi);
-
-			/* Move to the addressed state */
-			usbp->usaddr = udc_device->address;
-			mpc8xx_udc_state_transition_up (udc_device->device_state,
-							STATE_ADDRESSED);
-			return 0;
-
-		case USB_REQ_SET_CONFIGURATION:
-			if (!purb->device_request.wValue) {
-				/* Respond at default address */
-				usbp->usaddr = 0x00;
-				mpc8xx_udc_state_transition_down (udc_device->device_state,
-								  STATE_ADDRESSED);
-			} else {
-				/* TODO: Support multiple configurations */
-				mpc8xx_udc_state_transition_up (udc_device->device_state,
-								STATE_CONFIGURED);
-				for (x = 1; x < MAX_ENDPOINTS; x++) {
-					if ((udc_device->bus->endpoint_array[x].endpoint_address & USB_ENDPOINT_DIR_MASK)
-					    == USB_DIR_IN) {
-						ep_ref[x].pid = TX_BD_PID_DATA0;
-					} else {
-						ep_ref[x].pid = RX_BD_PID_DATA0;
-					}
-					/* Set configuration must unstall endpoints */
-					usbp->usep[x] &= ~STALL_BITMASK;
-				}
-			}
-			break;
-		default:
-			/* CDC/Vendor specific */
-			break;
-		}
-
-		/* Send ZLP as ACK in Status OUT phase */
-		ep_ref[0].pid = TX_BD_PID_DATA1;
-		purb->actual_length = 0;
-		mpc8xx_udc_init_tx (epi, purb);
-		mpc8xx_udc_ep_tx (epi);
-
-	} else {
-
-		if (purb->actual_length) {
-			ep_ref[0].pid = TX_BD_PID_DATA1;
-			mpc8xx_udc_init_tx (epi, purb);
-
-			if (!(purb->actual_length % EP0_MAX_PACKET_SIZE)) {
-				ep_ref[0].sc |= EP_SEND_ZLP;
-			}
-
-			if (purb->device_request.wValue ==
-			    USB_DESCRIPTOR_TYPE_DEVICE) {
-				if (le16_to_cpu (purb->device_request.wLength)
-				    > purb->actual_length) {
-					/* Send EP0_MAX_PACKET_SIZE bytes
-					 * unless correct size requested.
-					 */
-					if (purb->actual_length > epi->tx_packetSize) {
-						purb->actual_length = epi->tx_packetSize;
-					}
-				}
-			}
-			mpc8xx_udc_ep_tx (epi);
-
-		} else {
-			/* Corrupt SETUP packet? */
-			ERR ("Zero length data or SETUP with DATA-IN phase ?\n");
-			return 1;
-		}
-	}
-	return 0;
-}
-
-/* mpc8xx_udc_init_tx
- *
- * Setup some basic parameters for a TX transaction
- */
-static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
-				struct urb *tx_urb)
-{
-	epi->sent = 0;
-	epi->last = 0;
-	epi->tx_urb = tx_urb;
-}
-
-/* mpc8xx_udc_ep0_rx
- *
- * Receive ep0/control USB data. Parse and possibly send a response.
- */
-static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp)
-{
-	if (rx_cbdp->cbd_sc & RX_BD_PID_SETUP) {
-
-		/* Unconditionally accept SETUP packets */
-		if (mpc8xx_udc_ep0_rx_setup (rx_cbdp)) {
-			mpc8xx_udc_stall (0);
-		}
-
-	} else {
-
-		mpc8xx_udc_clear_rxbd (rx_cbdp);
-
-		if ((rx_cbdp->cbd_datlen - 2)) {
-			/* SETUP with a DATA phase
-			 * outside of SETUP packet.
-			 * Reply with STALL.
-			 */
-			mpc8xx_udc_stall (0);
-		}
-	}
-}
-
-/* mpc8xx_udc_epn_rx
- *
- * Receive some data from cbd into USB system urb data abstraction
- * Upper layers should NAK if there is insufficient RX data space
- */
-static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp)
-{
-	struct usb_endpoint_instance *epi = 0;
-	struct urb *urb = 0;
-	unsigned int x = 0;
-
-	if (epid >= MAX_ENDPOINTS || !rx_cbdp->cbd_datlen) {
-		return 0;
-	}
-
-	/* USB 2.0 PDF section 8.6.4
-	 * Discard data with invalid PID it is a resend.
-	 */
-	if (ep_ref[epid].pid != (rx_cbdp->cbd_sc & 0xC0)) {
-		return 1;
-	}
-	TOGGLE_RX_PID (ep_ref[epid].pid);
-
-	epi = &udc_device->bus->endpoint_array[epid];
-	urb = epi->rcv_urb;
-
-	for (; x < (rx_cbdp->cbd_datlen - 2); x++) {
-		*((unsigned char *) (urb->buffer + urb->actual_length + x)) =
-			*((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
-	}
-
-	if (x) {
-		usbd_rcv_complete (epi, x, 0);
-		if (ep_ref[epid].urb->status == RECV_ERROR) {
-			DBG ("RX error unset NAK\n");
-			udc_unset_nak (epid);
-		}
-	}
-	return x;
-}
-
-/* mpc8xx_udc_clock_init
- *
- * Obtain a clock reference for Full Speed Signaling
- */
-static void mpc8xx_udc_clock_init (volatile immap_t * immr,
-				   volatile cpm8xx_t * cp)
-{
-
-#if defined(CONFIG_SYS_USB_EXTC_CLK)
-
-	/* This has been tested with a 48MHz crystal on CLK6 */
-	switch (CONFIG_SYS_USB_EXTC_CLK) {
-	case 1:
-		immr->im_ioport.iop_papar |= 0x0100;
-		immr->im_ioport.iop_padir &= ~0x0100;
-		cp->cp_sicr |= 0x24;
-		break;
-	case 2:
-		immr->im_ioport.iop_papar |= 0x0200;
-		immr->im_ioport.iop_padir &= ~0x0200;
-		cp->cp_sicr |= 0x2D;
-		break;
-	case 3:
-		immr->im_ioport.iop_papar |= 0x0400;
-		immr->im_ioport.iop_padir &= ~0x0400;
-		cp->cp_sicr |= 0x36;
-		break;
-	case 4:
-		immr->im_ioport.iop_papar |= 0x0800;
-		immr->im_ioport.iop_padir &= ~0x0800;
-		cp->cp_sicr |= 0x3F;
-		break;
-	default:
-		udc_state = STATE_ERROR;
-		break;
-	}
-
-#elif defined(CONFIG_SYS_USB_BRGCLK)
-
-	/* This has been tested with brgclk == 50MHz */
-	int divisor = 0;
-
-	if (gd->cpu_clk < 48000000L) {
-		ERR ("brgclk is too slow for full-speed USB!\n");
-		udc_state = STATE_ERROR;
-		return;
-	}
-
-	/* Assume the brgclk is 'good enough', we want !(gd->cpu_clk%48MHz)
-	 * but, can /probably/ live with close-ish alternative rates.
-	 */
-	divisor = (gd->cpu_clk / 48000000L) - 1;
-	cp->cp_sicr &= ~0x0000003F;
-
-	switch (CONFIG_SYS_USB_BRGCLK) {
-	case 1:
-		cp->cp_brgc1 |= (divisor | CPM_BRG_EN);
-		cp->cp_sicr &= ~0x2F;
-		break;
-	case 2:
-		cp->cp_brgc2 |= (divisor | CPM_BRG_EN);
-		cp->cp_sicr |= 0x00000009;
-		break;
-	case 3:
-		cp->cp_brgc3 |= (divisor | CPM_BRG_EN);
-		cp->cp_sicr |= 0x00000012;
-		break;
-	case 4:
-		cp->cp_brgc4 = (divisor | CPM_BRG_EN);
-		cp->cp_sicr |= 0x0000001B;
-		break;
-	default:
-		udc_state = STATE_ERROR;
-		break;
-	}
-
-#else
-#error "CONFIG_SYS_USB_EXTC_CLK or CONFIG_SYS_USB_BRGCLK must be defined"
-#endif
-
-}
-
-/* mpc8xx_udc_cbd_attach
- *
- * attach a cbd to and endpoint
- */
-static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size)
-{
-
-	if (!tx_cbd[ep] || !rx_cbd[ep] || ep >= MAX_ENDPOINTS) {
-		udc_state = STATE_ERROR;
-		return;
-	}
-
-	if (tx_size > USB_MAX_PKT || rx_size > USB_MAX_PKT ||
-	    (!tx_size && !rx_size)) {
-		udc_state = STATE_ERROR;
-		return;
-	}
-
-	/* Attach CBD to appropiate Parameter RAM Endpoint data structure */
-	if (rx_size) {
-		endpoints[ep]->rbase = (u32) rx_cbd[rx_ct];
-		endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
-		rx_ct++;
-
-		if (!ep) {
-
-			endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
-			rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
-			rx_ct++;
-
-		} else {
-			rx_ct += 2;
-			endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
-			rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
-			rx_ct++;
-		}
-
-		/* Where we expect to RX data on this endpoint */
-		ep_ref[ep].prx = rx_cbd[rx_ct - 1];
-	} else {
-
-		ep_ref[ep].prx = 0;
-		endpoints[ep]->rbase = 0;
-		endpoints[ep]->rbptr = 0;
-	}
-
-	if (tx_size) {
-		endpoints[ep]->tbase = (u32) tx_cbd[tx_ct];
-		endpoints[ep]->tbptr = (u32) tx_cbd[tx_ct];
-		tx_ct++;
-	} else {
-		endpoints[ep]->tbase = 0;
-		endpoints[ep]->tbptr = 0;
-	}
-
-	endpoints[ep]->tstate = 0;
-	endpoints[ep]->tbcnt = 0;
-	endpoints[ep]->mrblr = EP_MAX_PKT;
-	endpoints[ep]->rfcr = 0x18;
-	endpoints[ep]->tfcr = 0x18;
-	ep_ref[ep].sc |= EP_ATTACHED;
-
-	DBG ("ep %d rbase 0x%08x rbptr 0x%08x tbase 0x%08x tbptr 0x%08x prx = %p\n",
-		ep, endpoints[ep]->rbase, endpoints[ep]->rbptr,
-		endpoints[ep]->tbase, endpoints[ep]->tbptr,
-		ep_ref[ep].prx);
-
-	return;
-}
-
-/* mpc8xx_udc_cbd_init
- *
- * Allocate space for a cbd and allocate TX/RX data space
- */
-static void mpc8xx_udc_cbd_init (void)
-{
-	int i = 0;
-
-	for (; i < TX_RING_SIZE; i++) {
-		tx_cbd[i] = (cbd_t *)
-			mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
-	}
-
-	for (i = 0; i < RX_RING_SIZE; i++) {
-		rx_cbd[i] = (cbd_t *)
-			mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
-	}
-
-	for (i = 0; i < TX_RING_SIZE; i++) {
-		tx_cbd[i]->cbd_bufaddr =
-			mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
-
-		tx_cbd[i]->cbd_sc = (TX_BD_I | TX_BD_W);
-		tx_cbd[i]->cbd_datlen = 0x0000;
-	}
-
-
-	for (i = 0; i < RX_RING_SIZE; i++) {
-		rx_cbd[i]->cbd_bufaddr =
-			mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
-		rx_cbd[i]->cbd_sc = (RX_BD_I | RX_BD_E);
-		rx_cbd[i]->cbd_datlen = 0x0000;
-
-	}
-
-	return;
-}
-
-/* mpc8xx_udc_endpoint_init
- *
- * Attach an endpoint to some dpram
- */
-static void mpc8xx_udc_endpoint_init (void)
-{
-	int i = 0;
-
-	for (; i < MAX_ENDPOINTS; i++) {
-		endpoints[i] = (usb_epb_t *)
-			mpc8xx_udc_alloc (sizeof (usb_epb_t), 32);
-	}
-}
-
-/* mpc8xx_udc_alloc
- *
- * Grab the address of some dpram
- */
-static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment)
-{
-	u32 retaddr = address_base;
-
-	while (retaddr % alignment) {
-		retaddr++;
-	}
-	address_base += data_size;
-
-	return retaddr;
-}
diff --git a/include/common.h b/include/common.h
index e272ef7..da2528b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -31,13 +31,10 @@ typedef volatile unsigned char	vu_char;
 #if defined(CONFIG_MPC859T)	|| \
     defined(CONFIG_MPC866P)
 # define CONFIG_MPC866_FAMILY 1
-#elif defined(CONFIG_MPC875)
-# define CONFIG_MPC885_FAMILY   1
 #endif
 #if   defined(CONFIG_MPC860)	   \
    || defined(CONFIG_MPC860T)	   \
-   || defined(CONFIG_MPC866_FAMILY) \
-   || defined(CONFIG_MPC885_FAMILY)
+   || defined(CONFIG_MPC866_FAMILY)
 # define CONFIG_MPC86x 1
 #endif
 #elif defined(CONFIG_5xx)
diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
deleted file mode 100644
index 4e3b727..0000000
--- a/include/configs/stxxtc.h
+++ /dev/null
@@ -1,485 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * Dan Malek, Embedded Edge, LLC, dan@embeddededge.com
- * U-Boot port on STx XTc 8xx board
- * Mostly copied from Panto's NETTA2 board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC875		1	/* This is a MPC875 CPU		*/
-#define CONFIG_STXXTC		1	/* ...on a STx XTc  board	*/
-
-#define	CONFIG_SYS_TEXT_BASE	0x40F00000
-
-#define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
-#undef	CONFIG_8xx_CONS_SMC2
-#undef	CONFIG_8xx_CONS_NONE
-
-#define CONFIG_BAUDRATE		115200	/* console baudrate = 115.2kbps	*/
-
-#define CONFIG_XIN		10000000	/* 10 MHz input xtal */
-
-/* Select one of few clock rates defined later in this file.
-*/
-/* #define MPC8XX_HZ		50000000 */
-#define MPC8XX_HZ		66666666
-
-#define CONFIG_8xx_GCLK_FREQ	MPC8XX_HZ
-
-#if 0
-#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/
-#else
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
-#endif
-
-#undef	CONFIG_CLOCKS_IN_MHZ	/* clocks NOT passsed to Linux in MHz */
-
-#undef	CONFIG_BOOTARGS
-#define CONFIG_BOOTCOMMAND							\
-	"tftpboot; "								\
-	"setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "	\
-	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; "	\
-	"bootm"
-
-#define CONFIG_SOURCE
-#define CONFIG_LOADS_ECHO	0	/* echo off for serial download	*/
-#undef	CONFIG_SYS_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
-
-#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
-
-#define	CONFIG_STATUS_LED	1	/* Status LED enabled		*/
-#define CONFIG_BOARD_SPECIFIC_LED	/* version has board specific leds */
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_NISDOMAIN
-
-
-#undef CONFIG_MAC_PARTITION
-#undef CONFIG_DOS_PARTITION
-
-#define	CONFIG_RTC_MPC8xx		/* use internal RTC of MPC8xx	*/
-
-#define	FEC_ENET		1	/* eth.c needs it that way... */
-#undef CONFIG_SYS_DISCOVER_PHY
-#define CONFIG_MII		1
-#define CONFIG_MII_INIT		1
-#undef CONFIG_RMII
-
-#define CONFIG_ETHER_ON_FEC1	1
-#define CONFIG_FEC1_PHY		1	/* phy address of FEC */
-#undef CONFIG_FEC1_PHY_NORXERR
-
-#define CONFIG_ETHER_ON_FEC2	1
-#define CONFIG_FEC2_PHY		3
-#undef CONFIG_FEC2_PHY_NORXERR
-
-#define CONFIG_ENV_OVERWRITE	1	/* allow modification of vendor params */
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PING
-
-
-#define CONFIG_BOARD_EARLY_INIT_F	1
-#define CONFIG_MISC_INIT_R
-
-/*
- * Miscellaneous configurable options
- */
-#define	CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define	CONFIG_SYS_PROMPT	"xtc> "		/* Monitor Command Prompt	*/
-
-#define CONFIG_SYS_HUSH_PARSER	1
-
-#if defined(CONFIG_CMD_KGDB)
-#define	CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
-#else
-#define	CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size	*/
-#endif
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0300000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x0700000	/* 3 ... 7 MB in DRAM	*/
-
-#define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	*/
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFF000000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define	CONFIG_SYS_INIT_RAM_SIZE	0x3000	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define	CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define	CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0x40000000
-#if defined(DEBUG)
-#define	CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
-#else
-#define	CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#endif
-
-/* yes this is weird, I know :) */
-#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE | 0x00F00000)
-#define	CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-
-#define CONFIG_SYS_RESET_ADDRESS	0x80000000
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define	CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux	*/
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define	CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_SECT_SIZE	0x10000
-
-#define	CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x00000000)
-#define CONFIG_ENV_OFFSET		0
-#define	CONFIG_ENV_SIZE		0x4000
-
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + 0x00010000)
-#define CONFIG_ENV_OFFSET_REDUND	0
-#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
-
-#define CONFIG_SYS_FLASH_CFI		1
-#define CONFIG_FLASH_CFI_DRIVER	1
-#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* use buffered writes (20x faster) */
-#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks	*/
-
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + 0x2000000 }
-
-#define CONFIG_SYS_FLASH_PROTECTION
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT	4	/* log base 2 of the above value */
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#if defined(CONFIG_WATCHDOG)
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
-			 SYPCR_SWE  | SYPCR_SWRI| SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-#endif
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_SIUMCR	(SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01 | SIUMCR_FRC | SIUMCR_GB5E)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register		11-27
- *-----------------------------------------------------------------------
- */
-#define CONFIG_SYS_RTCSC	(RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR	(PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register		15-30
- *-----------------------------------------------------------------------
- * Reset PLL lock status sticky bit, timer expired status bit and timer
- * interrupt status bit
- *
- */
-
-#if CONFIG_XIN == 10000000
-
-#if MPC8XX_HZ == 50000000
-#define CONFIG_SYS_PLPRCR	((0 << PLPRCR_MFN_SHIFT) | (0 << PLPRCR_MFD_SHIFT) | \
-			 (1 << PLPRCR_S_SHIFT) | (10 << PLPRCR_MFI_SHIFT) | (0 << PLPRCR_PDF_SHIFT) | \
-			 PLPRCR_TEXPS)
-#elif MPC8XX_HZ == 66666666
-#define CONFIG_SYS_PLPRCR	((1 << PLPRCR_MFN_SHIFT) | (2 << PLPRCR_MFD_SHIFT) | \
-			 (1 << PLPRCR_S_SHIFT) | (13 << PLPRCR_MFI_SHIFT) | (0 << PLPRCR_PDF_SHIFT) | \
-			 PLPRCR_TEXPS)
-#else
-#error unsupported CPU freq for XIN = 10MHz
-#endif
-#else
-#error unsupported freq for XIN (must be 10MHz)
-#endif
-
-
-/*
- *-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- *
- * Note: When TBS == 0 the timebase is independent of current cpu clock.
- */
-
-#define SCCR_MASK	SCCR_EBDF11
-#if MPC8XX_HZ > 66666666
-#define CONFIG_SYS_SCCR	(/* SCCR_TBS     | */ SCCR_CRQEN | \
-			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
-			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-			 SCCR_DFALCD00 | SCCR_EBDF01)
-#else
-#define CONFIG_SYS_SCCR	(/* SCCR_TBS     | */ SCCR_CRQEN | \
-			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
-			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-			 SCCR_DFALCD00)
-#endif
-
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-/*#define	CONFIG_SYS_DER	0x2002000F*/
-#define CONFIG_SYS_DER	0
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM	0x40000000	/* FLASH bank #0	*/
-#define FLASH_BASE1_PRELIM	0x42000000	/* FLASH bank #1	*/
-
-/* used to re-map FLASH both when starting from SRAM or FLASH:
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-
-#define FLASH_BANK_MAX_SIZE	0x01000000	/* max size per chip */
-
-#define CONFIG_SYS_REMAP_OR_AM		0x80000000
-#define CONFIG_SYS_PRELIM_OR_AM	(0xFFFFFFFFLU & ~(FLASH_BANK_MAX_SIZE - 1))
-
-/* FLASH timing: ACS = 11, TRLX = 0, CSNT = 1, SCY = 5, EHTR = 1	*/
-#define CONFIG_SYS_OR_TIMING_FLASH	(OR_CSNT_SAM  | OR_BI | OR_SCY_5_CLK | OR_TRLX)
-
-#define CONFIG_SYS_OR0_REMAP	(CONFIG_SYS_REMAP_OR_AM  | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_OR0_PRELIM	(CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR0_PRELIM	((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_16 | BR_V )
-
-#define CONFIG_SYS_OR1_PRELIM	((0xFFFFFFFFLU & ~(FLASH_BANK_MAX_SIZE - 1)) | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR1_PRELIM	((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_PS_16 | BR_V )
-
-/*
- * BR4 and OR4 (SDRAM)
- *
- */
-#define SDRAM_BASE1_PRELIM	0x00000000	/* SDRAM bank #0	*/
-#define	SDRAM_MAX_SIZE		(256 << 20)	/* max 256MB per bank	*/
-
-/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
-#define CONFIG_SYS_OR_TIMING_SDRAM	(OR_CSNT_SAM | OR_G5LS)
-
-#define CONFIG_SYS_OR4_PRELIM	((0xFFFFFFFFLU & ~(SDRAM_MAX_SIZE - 1)) | CONFIG_SYS_OR_TIMING_SDRAM)
-#define CONFIG_SYS_BR4_PRELIM	((SDRAM_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_PS_32 | BR_V)
-
-/*
- * Memory Periodic Timer Prescaler
- */
-
-/*
- * Memory Periodic Timer Prescaler
- *
- * The Divider for PTA (refresh timer) configuration is based on an
- * example SDRAM configuration (64 MBit, one bank). The adjustment to
- * the number of chip selects (NCS) and the actually needed refresh
- * rate is done by setting MPTPR.
- *
- * PTA is calculated from
- *	PTA = (gclk * Trefresh) / ((2 ^ (2 * DFBRG)) * PTP * NCS)
- *
- *	gclk	  CPU clock (not bus clock!)
- *	Trefresh  Refresh cycle * 4 (four word bursts used)
- *
- * 4096  Rows from SDRAM example configuration
- * 1000  factor s -> ms
- *   32  PTP (pre-divider from MPTPR) from SDRAM example configuration
- *    4  Number of refresh cycles per period
- *   64  Refresh cycle in ms per number of rows
- * --------------------------------------------
- * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000
- *
- * 50 MHz => 50.000.000 / Divider =  98
- * 66 Mhz => 66.000.000 / Divider = 129
- * 80 Mhz => 80.000.000 / Divider = 156
- */
-
-#define CONFIG_SYS_MAMR_PTA		 234
-
-/*
- * For 16 MBit, refresh rates could be 31.3 us
- * (= 64 ms / 2K = 125 / quad bursts).
- * For a simpler initialization, 15.6 us is used instead.
- *
- * #define CONFIG_SYS_MPTPR_2BK_2K	MPTPR_PTP_DIV32		for 2 banks
- * #define CONFIG_SYS_MPTPR_1BK_2K	MPTPR_PTP_DIV64		for 1 bank
- */
-#define CONFIG_SYS_MPTPR_2BK_4K	MPTPR_PTP_DIV16		/* setting for 2 banks	*/
-#define CONFIG_SYS_MPTPR_1BK_4K	MPTPR_PTP_DIV32		/* setting for 1 bank	*/
-
-/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit		*/
-#define CONFIG_SYS_MPTPR_2BK_8K	MPTPR_PTP_DIV8		/* setting for 2 banks	*/
-#define CONFIG_SYS_MPTPR_1BK_8K	MPTPR_PTP_DIV16		/* setting for 1 bank	*/
-
-/*
- * MAMR settings for SDRAM
- */
-
-/* 8 column SDRAM */
-#define CONFIG_SYS_MAMR_8COL	((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
-			 MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 |	\
-			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
-
-/* 9 column SDRAM */
-#define CONFIG_SYS_MAMR_9COL	((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
-			 MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |	\
-			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
-
-#define CONFIG_LAST_STAGE_INIT		/* needed to reset the damn phys */
-
-/****************************************************************/
-
-#define NAND_SIZE	0x00010000	/* 64K */
-#define NAND_BASE	0xF1000000
-
-/*****************************************************************************/
-
-#define CONFIG_SYS_DIRECT_FLASH_TFTP
-
-/*****************************************************************************/
-
-/* Status Leds are on the MODCK pins, which become the PCMCIA PGCRB,
- * CxOE and CxRESET.  We use the CxOE.
- */
-#define STATUS_LED_BIT		0x00000080		/* bit 24 */
-
-#define STATUS_LED_PERIOD	(CONFIG_SYS_HZ / 2)
-#define STATUS_LED_STATE	STATUS_LED_BLINKING
-
-#define STATUS_LED_ACTIVE	0		/* LED on for bit == 0	*/
-#define STATUS_LED_BOOT		0		/* LED 0 used for boot status */
-
-#ifndef __ASSEMBLY__
-
-/* LEDs */
-
-/* led_id_t is unsigned int mask */
-typedef unsigned int led_id_t;
-
-#define __led_toggle(_msk) \
-	do { \
-		((volatile immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcrb ^= (_msk); \
-	} while(0)
-
-#define __led_set(_msk, _st) \
-	do { \
-		if ((_st)) \
-			((volatile immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcrb |= (_msk); \
-		else \
-			((volatile immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcrb &= ~(_msk); \
-	} while(0)
-
-#define __led_init(msk, st) __led_set(msk, st)
-
-#endif
-
-/******************************************************************************/
-
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE	1
-#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE	1
-
-/******************************************************************************/
-
-/* use board specific hardware */
-#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
-#define CONFIG_HW_WATCHDOG
-
-/*****************************************************************************/
-
-#define CONFIG_AUTO_COMPLETE	1
-#define CONFIG_CRC32_VERIFY	1
-#define CONFIG_HUSH_OLD_PARSER_COMPATIBLE	1
-
-/*****************************************************************************/
-
-/* pass open firmware flattened device tree */
-#define CONFIG_OF_LIBFDT	1
-
-#define OF_TBCLK		(MPC8XX_HZ / 16)
-
-#endif	/* __CONFIG_H */
diff --git a/include/status_led.h b/include/status_led.h
index b8aaaf7..a41d3bc 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -231,10 +231,6 @@ void status_led_set  (int led, int state);
# define STATUS_LED_BOOT        0               /* LED 0 used for boot status */
-/*****  STx XTc    ********************************************************/
-#elif defined(CONFIG_STXXTC)
-/* XXX empty just to avoid the error */
-/************************************************************************/
 #elif defined(CONFIG_V38B)
# define STATUS_LED_BIT		0x0010			/* Timer7 GPIO */
diff --git a/include/usb/mpc8xx_udc.h b/include/usb/mpc8xx_udc.h
deleted file mode 100644
index 9906c75..0000000
--- a/include/usb/mpc8xx_udc.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * Copyright (C) 2006 Bryan O'Donoghue, CodeHermit
- * bodonoghue@codehermit.ie
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <commproc.h>
-
-/* Mode Register */
-#define USMOD_EN	0x01
-#define USMOD_HOST	0x02
-#define USMOD_TEST	0x04
-#define USMOD_SFTE	0x08
-#define USMOD_RESUME	0x40
-#define USMOD_LSS	0x80
-
-/* Endpoint Registers */
-#define USEP_RHS_NORM	0x00
-#define USEP_RHS_IGNORE	0x01
-#define USEP_RHS_NAK	0x02
-#define USEP_RHS_STALL	0x03
-
-#define USEP_THS_NORM	0x00
-#define USEP_THS_IGNORE	0x04
-#define USEP_THS_NAK	0x08
-#define USEP_THS_STALL	0x0C
-
-#define USEP_RTE	0x10
-#define USEP_MF		0x20
-
-#define USEP_TM_CONTROL	0x00
-#define USEP_TM_INT	0x100
-#define USEP_TM_BULK	0x200
-#define USEP_TM_ISO	0x300
-
-/* Command Register */
-#define USCOM_EP0	0x00
-#define USCOM_EP1	0x01
-#define USCOM_EP2	0x02
-#define USCOM_EP3	0x03
-
-#define USCOM_FLUSH	0x40
-#define USCOM_STR	0x80
-
-/* Event Register */
-#define USB_E_RXB	0x0001
-#define USB_E_TXB	0x0002
-#define USB_E_BSY	0x0004
-#define USB_E_SOF	0x0008
-#define USB_E_TXE1	0x0010
-#define USB_E_TXE2	0x0020
-#define USB_E_TXE3	0x0040
-#define USB_E_TXE4	0x0080
-#define USB_TX_ERRMASK (USB_E_TXE1|USB_E_TXE2|USB_E_TXE3|USB_E_TXE4)
-#define USB_E_IDLE	0x0100
-#define USB_E_RESET	0x0200
-
-/* Mask Register */
-#define USBS_IDLE	0x01
-
-/* RX Buffer Descriptor */
-#define RX_BD_OV	0x02
-#define RX_BD_CR	0x04
-#define RX_BD_AB	0x08
-#define RX_BD_NO	0x10
-#define RX_BD_PID_DATA0	0x00
-#define RX_BD_PID_DATA1	0x40
-#define RX_BD_PID_SETUP	0x80
-#define RX_BD_F		0x400
-#define RX_BD_L		0x800
-#define RX_BD_I		0x1000
-#define RX_BD_W		0x2000
-#define RX_BD_E		0x8000
-
-/* Useful masks */
-#define RX_BD_PID_BITMASK (RX_BD_PID_DATA1 | RX_BD_PID_SETUP)
-#define STALL_BITMASK (USEP_THS_STALL | USEP_RHS_STALL)
-#define NAK_BITMASK (USEP_THS_NAK | USEP_RHS_NAK)
-#define CBD_TX_BITMASK (TX_BD_R | TX_BD_L | TX_BD_TC | TX_BD_I | TX_BD_CNF)
-
-/* TX Buffer Descriptor */
-#define TX_BD_UN	0x02
-#define TX_BD_TO	0x04
-#define TX_BD_NO_PID	0x00
-#define TX_BD_PID_DATA0	0x80
-#define TX_BD_PID_DATA1	0xC0
-#define TX_BD_CNF	0x200
-#define TX_BD_TC	0x400
-#define TX_BD_L		0x800
-#define TX_BD_I		0x1000
-#define TX_BD_W		0x2000
-#define TX_BD_R		0x8000
-
-/* Implementation specific defines */
-
-#define EP_MIN_PACKET_SIZE 0x08
-#define MAX_ENDPOINTS	0x04
-#define FIFO_SIZE	0x10
-#define EP_MAX_PKT	FIFO_SIZE
-#define TX_RING_SIZE	0x04
-#define RX_RING_SIZE	0x06
-#define USB_MAX_PKT	0x40
-#define TOGGLE_TX_PID(x) x= ((~x)&0x40)|0x80
-#define TOGGLE_RX_PID(x) x^= 0x40
-#define EP_ATTACHED	0x01	/* Endpoint has a urb attached or not */
-#define EP_SEND_ZLP	0x02	/* Send ZLP y/n ? */
-
-#define PROFF_USB	0x00000000
-#define CPM_USB_BASE	0x00000A00
-
-/* UDC device defines */
-#define EP0_MAX_PACKET_SIZE	EP_MAX_PKT
-
-#define UDC_OUT_PACKET_SIZE	EP_MIN_PACKET_SIZE
-#define UDC_IN_PACKET_SIZE	EP_MIN_PACKET_SIZE
-#define UDC_INT_PACKET_SIZE	UDC_IN_PACKET_SIZE
-#define UDC_BULK_PACKET_SIZE	EP_MIN_PACKET_SIZE
-
-struct mpc8xx_ep {
-	struct urb * urb;
-	unsigned char pid;
-	unsigned char sc;
-	volatile cbd_t * prx;
-};
-
-typedef struct mpc8xx_usb{
-	char usmod;	/* Mode Register */
-	char usaddr;	/* Slave Address Register */
-	char uscom;	/* Command Register */
-	char res1;	/* Reserved */
-	ushort usep[4];
-	ulong res2;	/* Reserved */
-	ushort usber;	/* Event Register */
-	ushort res3;	/* Reserved */
-	ushort usbmr;	/* Mask Register */
-	char res4;	/* Reserved */
-	char usbs;	/* Status Register */
-	char res5[8];	/* Reserved */
-}usb_t;
-
-typedef struct mpc8xx_parameter_ram{
-	ushort ep0ptr;	/* Endpoint Pointer Register 0 */
-	ushort ep1ptr;	/* Endpoint Pointer Register 1 */
-	ushort ep2ptr;	/* Endpoint Pointer Register 2 */
-	ushort ep3ptr;	/* Endpoint Pointer Register 3 */
-	uint rstate;	/* Receive state */
-	uint rptr;	/* Receive internal data pointer */
-	ushort frame_n;	/* Frame number */
-	ushort rbcnt;	/* Receive byte count */
-	uint rtemp;	/* Receive temp cp use only */
-	uint rxusb;	/* Rx Data Temp */
-	ushort rxuptr;	/* Rx microcode return address temp */
-}usb_pram_t;
-
-typedef struct endpoint_parameter_block_pointer{
-	ushort rbase;	/* RxBD base address */
-	ushort tbase;	/* TxBD base address */
-	char rfcr;	/* Rx Function code */
-	char tfcr;	/* Tx Function code */
-	ushort mrblr;	/* Maximum Receive Buffer Length */
-	ushort rbptr;	/* RxBD pointer Next Buffer Descriptor */
-	ushort tbptr;	/* TxBD pointer Next Buffer Descriptor  */
-	ulong tstate;	/* Transmit internal state */
-	ulong tptr;	/* Transmit internal data pointer */
-	ushort tcrc;	/* Transmit temp CRC */
-	ushort tbcnt;	/* Transmit internal bye count */
-	ulong ttemp;	/* Tx temp */
-	ushort txuptr;	/* Tx microcode return address */
-	ushort res1;	/* Reserved */
-}usb_epb_t;
-
-typedef enum mpc8xx_udc_state{
-	STATE_NOT_READY,
-	STATE_ERROR,
-	STATE_READY,
-}mpc8xx_udc_state_t;
-
diff --git a/include/usb/udc.h b/include/usb/udc.h
index 1f545ec..b5628db 100644
--- a/include/usb/udc.h
+++ b/include/usb/udc.h
@@ -12,8 +12,8 @@
 #define EP_MAX_PACKET_SIZE	64
 #endif
-#if !defined(CONFIG_PPC) && !defined(CONFIG_OMAP1510)
-/* omap1510_udc.h and mpc8xx_udc.h will set these values */
+#if !defined(CONFIG_OMAP1510)
+/* omap1510_udc.h will set these values */
 #define UDC_OUT_PACKET_SIZE     EP_MAX_PACKET_SIZE
 #define UDC_IN_PACKET_SIZE      EP_MAX_PACKET_SIZE
 #define UDC_INT_PACKET_SIZE     EP_MAX_PACKET_SIZE
-- 
1.9.1


    