21 Jun
2023
21 Jun
'23
8:40 p.m.
On Wed, Jun 21, 2023 at 03:51:18PM +0530, Nikhil M Jain wrote:
To understand usage of DDR in A53 SPL stage, add a table showing region and space used by major components of SPL.
Signed-off-by: Nikhil M Jain n-jain1@ti.com
Reviewed-by: Tom Rini trini@konsulko.com
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Tom