Provide a proper reset for the Ethernet PHY (LAN8700) on the MX51EVK.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- board/freescale/mx51evk/mx51evk.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 75d642b..70cce55 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -261,6 +261,10 @@ static void power_init(void)
/* Reset the ethernet controller over GPIO */ writel(0x1, IOMUXC_BASE_ADDR + 0x0AC); + udelay(200); + reg = readl(GPIO2_BASE_ADDR + 0x0); + reg |= 0x4000; /* Set reset line to high*/ + writel(reg, GPIO2_BASE_ADDR + 0x0);
/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |