From: "Jens Scharsig (BuS Elektronik)" esw@bus-elektronik.de
* add CONFIG_SYS_CACHELINE_SIZE to eb_cpux9k2 board config header * dissable dcache (CONFIG_SYS_DCACHE_OFF) for eb_cpux9k2
Signed-off-by: Jens Scharsig (BuS Elektronik) esw@bus-elektronik.de ---
This patch is send in reqest of http://lists.denx.de/pipermail/u-boot/2012-October/136404.html It fix compliation errors as long as 920t cache is not implemented.
include/configs/eb_cpux9k2.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 9371ec3..3be4929 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -43,6 +43,10 @@
#define MACH_TYPE_EB_CPUX9K2 1977 #define CONFIG_MACH_TYPE MACH_TYPE_EB_CPUX9K2 + +#define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_DCACHE_OFF + /*--------------------------------------------------------------------------*/ #ifndef CONFIG_RAMBOOT #define CONFIG_SYS_TEXT_BASE 0x00000000 @@ -56,7 +60,6 @@ #define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1 #define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
- #define CONFIG_BOOT_RETRY_TIME 30 #define CONFIG_CMDLINE_EDITING