
On Sun, 3 Oct 2021 21:16:54 +0800 Chukun Pan amadeus@jmu.edu.cn wrote:
This adds support for the NanoPi R1S H5 board.
Allwinner H5 SoC 512MB DDR3 RAM 10/100/1000M Ethernet x 2 RTL8189ETV WiFi 802.11b/g/n USB 2.0 host port (A) MicroSD Slot Reset button Serial Debug Port WAN - LAN - SYS LED
The dts file is taken from Linux 5.14 tag, and includes the change to the eeprom node [1], which it's not yet merged.
Please don't include not-yet-merged parts in here. Make a verbatim copy of the version in Linus' tree. I can fix this up while merging, if you don't mind.
The change shouldn't affect U-Boot itself anyway, IIUC, but out of curiosity: who is reading the MAC address out of the EEPROM, and how does it land in the kernel (if it lands there)?
One more thing below:
[1] https://lore.kernel.org/lkml/20211001145036.18129-1-amadeus@jmu.edu.cn
Signed-off-by: Chukun Pan amadeus@jmu.edu.cn
arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts | 196 +++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 + configs/nanopi_r1s_h5_defconfig | 13 ++ 4 files changed, 215 insertions(+) create mode 100644 arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts create mode 100644 configs/nanopi_r1s_h5_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9e44817a40..e278480c1c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -632,6 +632,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \ sun50i-h5-libretech-all-h5-cc.dtb \ sun50i-h5-nanopi-neo2.dtb \ sun50i-h5-nanopi-neo-plus2.dtb \
- sun50i-h5-nanopi-r1s-h5.dtb \ sun50i-h5-orangepi-zero-plus.dtb \ sun50i-h5-orangepi-pc2.dtb \ sun50i-h5-orangepi-prime.dtb \
diff --git a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts new file mode 100644 index 0000000000..4f01c17c49 --- /dev/null +++ b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (C) 2021 Chukun Pan amadeus@jmu.edu.cn
- Based on sun50i-h5-nanopi-neo-plus2.dts, which is:
- Copyright (C) 2017 Antony Antony antony@phenome.org
- Copyright (C) 2016 ARM Ltd.
- */
+/dts-v1/; +#include "sun50i-h5.dtsi" +#include "sun50i-h5-cpu-opp.dtsi"
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h>
+/ {
- model = "FriendlyARM NanoPi R1S H5";
- compatible = "friendlyarm,nanopi-r1s-h5", "allwinner,sun50i-h5";
- aliases {
ethernet0 = &emac;
ethernet1 = &rtl8189etv;
serial0 = &uart0;
- };
- chosen {
stdout-path = "serial0:115200n8";
- };
- leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>;
};
led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-2 {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>;
};
- };
- r-gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
};
- };
- reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
- };
- reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- };
- reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
- };
- vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
gpios-states = <0x1>;
states = <1100000 0x0>, <1300000 0x1>;
- };
- wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
- };
+};
+&cpu0 {
- cpu-supply = <&vdd_cpux>;
+};
+&ehci1 {
- status = "okay";
+};
+&ehci2 {
- status = "okay";
+};
+&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
- phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii-id";
- status = "okay";
+};
+&external_mdio {
- ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
- };
+};
+&i2c0 {
- status = "okay";
- eeprom@51 {
compatible = "atmel,24c02";
pagesize = <16>;
reg = <0x51>;
read-only; /* This holds our MAC */
- };
+};
+&mmc0 {
- vmmc-supply = <®_vcc3v3>;
- bus-width = <4>;
- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
- status = "okay";
+};
+&mmc1 {
- vmmc-supply = <®_vcc3v3>;
- vqmmc-supply = <®_vcc3v3>;
- mmc-pwrseq = <&wifi_pwrseq>;
- bus-width = <4>;
- non-removable;
- status = "okay";
- rtl8189etv: sdio_wifi@1 {
reg = <1>;
- };
+};
+&ohci1 {
- status = "okay";
+};
+&ohci2 {
- status = "okay";
+};
+&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pa_pins>;
- status = "okay";
+};
+&usb_otg {
- dr_mode = "peripheral";
- status = "okay";
+};
+&usbphy {
- /* USB Type-A port's VBUS is always on */
- usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
- usb0_vbus-supply = <®_usb0_vbus>;
- status = "okay";
+}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 4fc26077b2..6cb36d8209 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -358,6 +358,11 @@ M: Jelle van der Waa jelle@vdwaa.nl S: Maintained F: configs/nanopi_neo_air_defconfig
+NANOPI-R1S-H5 BOARD +M: Chukun Pan amadeus@jmu.edu.cn +S: Maintained +F: configs/nanopi_r1s_h5_defconfig
NANOPI-A64 BOARD M: Jagan Teki jagan@amarulasolutions.com S: Maintained diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig new file mode 100644 index 0000000000..2a6f94afe4 --- /dev/null +++ b/configs/nanopi_r1s_h5_defconfig @@ -0,0 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-r1s-h5" +CONFIG_SPL=y +CONFIG_MACH_SUN50I_H5=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y
The nanopi_neo_plus2_defconfig has CONFIG_MACPWR set to PD6. According to the DT above this GPIO is also used on the R1S. So why is CONFIG_MACPWR missing from the defconfig?
Cheers, Andre