
14 Mar
2016
14 Mar
'16
6:43 a.m.
On Sat, Mar 12, 2016 at 1:07 PM, Simon Glass sjg@chromium.org wrote:
At present pin configuration on link does not use the standard mechanism, but some rather ugly custom code. As a first step to resolving this, add the pin configuration to the device tree.
Four of the GPIOs must be available before relocation (for SDRAM pin strapping).
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Add GPIO output definition for a1 and a6
arch/x86/dts/chromebook_link.dts | 155 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 155 insertions(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com