From: Stefan Agner stefan.agner@toradex.com
Using the DDR Validation tool in Processor Expert uncovered two timing inconsistencies. Since those timings are related to the suspend mode they do not affect or change regular memory behaviour.
Signed-off-by: Stefan Agner stefan.agner@toradex.com Acked-by: Marcel Ziswiler marcel.ziswiler@toradex.com
---
board/toradex/colibri_vf/colibri_vf.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index d28a73332a..8c4909af54 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -99,15 +99,21 @@ int dram_init(void) .tras_lockout = 0, .tdal = 12, .bstlen = 3, - .tdll = 512, + .tdll = 512, /* not applicable since freq. scaling + * is not used + */ .trp_ab = 6, .tref = 3120, .trfc = 64, .tref_int = 0, .tpdex = 3, .txpdll = 10, - .txsnr = 48, - .txsr = 468, + .txsnr = 68, /* changed to conform to JEDEC + * specifications + */ + .txsr = 506, /* changed to conform to JEDEC + * specifications + */ .cksrx = 5, .cksre = 5, .freq_chg_en = 0,