On Wed, Mar 6, 2013 at 6:18 AM, Akshay Saraswat akshay.s@samsung.com wrote:
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI arun.m@samsung.com Signed-off-by: Akshay Saraswat akshay.s@samsung.com
Acked-by: Simon Glass sjg@chromium.org
Changes since v1: - Moved code to drivers/crypto. - Fixed few other nits.
Changes since v2: - Added falling back to software sha256 in case length exceeds buffer limit. - Reduced one tab at lines 533, 559 and 571 in this patch. - Removed space after a cast at line 506 in this patch. - Removed blank line at line 561 in this patch. - Removed space before semicolon at line 576 in this patch.
Changes since v3: - Removed buffer limit since there are 2 regs for address hash_msg_size_high and low. That means buffer length could go upto 2^64 bits which is practically - Removed falling back to software sha256 because there is no buffer limit. - Removed "/ 4" to sha1 and sha256 lengths and added increment to 4 in for loop at line 573. - Timed out still kept to be 100 ms since this is enough for hardware to switch status to idle from busy. In case it couldn't that means h/w is faulty.
Changes since v4: - Added include for clk.h. - Added define for MAX_FREQ. - Added timeout calculation as per frequency. - Changed "i+=4" to "i++" and "len" to "len/4" in for loop at line 591 in this patch. - Added two new functions ace_sha256 and ace_sha1.
Makefile | 1 + arch/arm/include/asm/arch-exynos/cpu.h | 4 + drivers/crypto/Makefile | 47 +++++ drivers/crypto/ace_sfr.h | 310 +++++++++++++++++++++++++++++++++ drivers/crypto/ace_sha.c | 138 +++++++++++++++ include/ace_sha.h | 67 +++++++ 6 files changed, 567 insertions(+) create mode 100644 drivers/crypto/Makefile create mode 100644 drivers/crypto/ace_sfr.h create mode 100644 drivers/crypto/ace_sha.c create mode 100644 include/ace_sha.h