On 05/18/2017 08:26 PM, Rush, Jason A. wrote:
Add the 'cdns,trigger-address' property to the cadence QSPI device node for Altera SoC devices.
Signed-off-by: Jason A. Rush jason.rush@gd-ms.com
+CC Dinh, is that address correct ? I think there was some discussion.
Jason, I'd rather prefer if you sent this as a series (with git send-email) not as a set of separate patches. Also, I'd prefer if you would just sync up the whole block with standard agreed-upon (linux) DT bindings and then ev. tweak the driver.
arch/arm/dts/socfpga.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index 8588221e57..abf0648a6f 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -646,6 +646,7 @@ num-cs = <4>; fifo-depth = <128>; sram-size = <128>;
cdns,trigger-address = <0x00000000>; bus-num = <2>; status = "disabled";