Currently, IECTRL is enabled after pin-mux settings for the low-level debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input signals are pulled-down, i.e. glitch signal (Low to High transition) problem occurs if pin-mux is set up first. As a result, one invalid character is input to the UART block and the auto-boot counting is terminated immediately.
The correct initialization procedure is: [1] Enable IECTRL (if IECTRL exists for the pins) [2] Set up pin-muxing [3] Deassert the reset of the hardware block
Currently, the low-level debugging is working for PH1-sLD3 and PH1-Pro4, but just in case, follow the sequence for all the SoCs.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S | 10 +++++----- arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S | 14 +++++++------- arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S | 6 +++--- arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S | 10 +++++----- 4 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S index fd393dc..c0f14e0 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S @@ -14,16 +14,16 @@ #include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug) - init_debug_uart r0, r1, r2 + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0]
/* UART Port 0 */ sg_set_pinsel 85, 1, 8, 4, r0, r1 sg_set_pinsel 88, 1, 8, 4, r0, r1
- ldr r0, =SG_IECTRL - ldr r1, [r0] - orr r1, r1, #1 - str r1, [r0] + init_debug_uart r0, r1, r2
mov pc, lr ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S index ce5dd4b..56f3851 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S @@ -15,13 +15,6 @@ #include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug) - ldr r0, =SC_CLKCTRL - ldr r1, [r0] - orr r1, r1, #SC_CLKCTRL_CEN_PERI - str r1, [r0] - - init_debug_uart r0, r1, r2 - /* UART Port 0 */ sg_set_pinsel 127, 0, 4, 8, r0, r1 sg_set_pinsel 128, 0, 4, 8, r0, r1 @@ -30,5 +23,12 @@ ENTRY(setup_lowlevel_debug) mov r1, #1 str r1, [r0]
+ ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CEN_PERI + str r1, [r0] + + init_debug_uart r0, r1, r2 + mov pc, lr ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S index ee2eae6..f4eccb4 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S @@ -15,6 +15,9 @@ #include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug) + sg_set_pinsel 63, 0, 4, 4, r0, r1 + sg_set_pinsel 64, 1, 4, 4, r0, r1 + ldr r0, =BCSCR5 ldr r1, =0x24440000 str r1, [r0] @@ -26,8 +29,5 @@ ENTRY(setup_lowlevel_debug)
init_debug_uart r0, r1, r2
- sg_set_pinsel 63, 0, 4, 4, r0, r1 - sg_set_pinsel 64, 1, 4, 4, r0, r1 - mov pc, lr ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S index 3ada4c9..571ce60 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S @@ -14,16 +14,16 @@ #include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug) - init_debug_uart r0, r1, r2 + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0]
/* UART Port 0 */ sg_set_pinsel 70, 3, 8, 4, r0, r1 sg_set_pinsel 71, 3, 8, 4, r0, r1
- ldr r0, =SG_IECTRL - ldr r1, [r0] - orr r1, r1, #1 - str r1, [r0] + init_debug_uart r0, r1, r2
mov pc, lr ENDPROC(setup_lowlevel_debug)