jérémy alcim alcim.dev@gmail.com schrieb am Fr., 29. Nov. 2019, 08:32:
Hi, i think i have find the problem, but i think i doesn't have the experience for modifie that. on the file : drivers/fpga/ socfpga_gen5.c : line 161 : function <fpgamgr_program_poll_initphase> :
- we wait fot the return of the fonction <fpgamgr_get_mode> with the
value <FPGAMGRREGS_MODE_INITPHASE> or <FPGAMGRREGS_MODE_USERMODE> 2. but he never comming its always the value <FPGAMGRREGS_MODE_CFGPHASE> then we are the timing out.
Then the fpga is on configuration mode, my question is:
- How to set him on user mode ?
- Why the configuration is not finalised ?
- Where i can find information for finalise it ?
I want to contribute, but im a noobies :)
Most probably, the FPGA is stuck in configuration phase because the file you were trying to program is not a valid programming file. Unless I'm really mistaken, this does not have anything to do with what's discussed in this thread.
Regards, Simon
Le jeu. 10 oct. 2019 à 09:48, Marek Vasut marex@denx.de a écrit :
On 10/10/19 7:15 AM, Simon Goldschmidt wrote: [...]
Have you dropped this? It's assigned to me in patchwork (I'm going through the list of old items assigned to me...).
I don't know, sorry. Apparently there isn't enough information to
decide
whether this patch is correct or not.
Right. However, since it seems to work as is, I don't think we have a
real
problem.
I think the datasheet could use clarification in that aspect. But it might be way too late for that.
-- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot