-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Araya, Jose Sent: 2019年3月9日 0:59 To: u-boot@lists.denx.de Subject: [U-Boot] Custom SPL for im.X6UL
Hello everyone,
I would like to ask what would be a good starting point to have a custom multi-stage booting for the NXP i.mx6UL processor?
Basically I need to be able to configure an FPGA before the U-Boot is executed. The reason for that is that the PGA must be configured so that the im6UL can have a physical connection to the DRAM. To clarify:
In the circuit, the DRAM will be multiplexed by an FPGA. If the FPGAis not configured, the imx6UL has no access to the DRAM.
The imx6UL has a direct SPI connection to the flash and to the FPGA,so all I need is to take the bitstream from a given location in the FLASH and load it into the FPGA, then just wait for a flag (GPIO?) saying that the FPGA was successfully configured and keep the booting process in the processor as normal.
As I haven't done yet anything similar, just wanted to know if you have any recommendations regarding where to start and some hints to proceed.
SPL might help here, because it runs in OCRAM.
Regards, Peng.
Thanks in advance!
Bests,
Jose Moises
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