Add a bare-bones CPU driver so that CPUs can be probed.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v4: - Change apollolake to apl - Tidy up header guards
Changes in v3: - Add two more defines for the CPU driver - Expand comments for BOOT_FROM_FAST_SPI_FLASH
Changes in v2: None
arch/x86/cpu/apollolake/Makefile | 1 + arch/x86/cpu/apollolake/cpu.c | 51 ++++++++++++++++++++++ arch/x86/include/asm/arch-apollolake/cpu.h | 27 ++++++++++++ 3 files changed, 79 insertions(+) create mode 100644 arch/x86/cpu/apollolake/cpu.c create mode 100644 arch/x86/include/asm/arch-apollolake/cpu.h
diff --git a/arch/x86/cpu/apollolake/Makefile b/arch/x86/cpu/apollolake/Makefile index 1fde400d77..274d44e859 100644 --- a/arch/x86/cpu/apollolake/Makefile +++ b/arch/x86/cpu/apollolake/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_SPL_BUILD) += spl.o obj-$(CONFIG_SPL_BUILD) += systemagent.o
ifndef CONFIG_TPL_BUILD +obj-y += cpu.o obj-y += punit.o endif
diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c new file mode 100644 index 0000000000..089923e85a --- /dev/null +++ b/arch/x86/cpu/apollolake/cpu.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2019 Google LLC + */ + +#include <common.h> +#include <cpu.h> +#include <dm.h> +#include <asm/cpu_common.h> +#include <asm/cpu_x86.h> + +struct cpu_apl_priv { +}; + +static int apl_get_info(struct udevice *dev, struct cpu_info *info) +{ + return cpu_intel_get_info(info, INTEL_BCLK_MHZ); +} + +static int apl_get_count(struct udevice *dev) +{ + return 4; +} + +static int cpu_x86_apl_probe(struct udevice *dev) +{ + return 0; +} + +static const struct cpu_ops cpu_x86_apl_ops = { + .get_desc = cpu_x86_get_desc, + .get_info = apl_get_info, + .get_count = apl_get_count, + .get_vendor = cpu_x86_get_vendor, +}; + +static const struct udevice_id cpu_x86_apl_ids[] = { + { .compatible = "intel,apl-cpu" }, + { } +}; + +U_BOOT_DRIVER(cpu_x86_apl_drv) = { + .name = "cpu_x86_apl", + .id = UCLASS_CPU, + .of_match = cpu_x86_apl_ids, + .bind = cpu_x86_bind, + .probe = cpu_x86_apl_probe, + .ops = &cpu_x86_apl_ops, + .priv_auto_alloc_size = sizeof(struct cpu_apl_priv), + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/arch/x86/include/asm/arch-apollolake/cpu.h b/arch/x86/include/asm/arch-apollolake/cpu.h new file mode 100644 index 0000000000..ab712b0810 --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/cpu.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2019 Google LLC + */ + +#ifndef _ASM_ARCH_CPU_H +#define _ASM_ARCH_CPU_H + +/* Common Timer Copy (CTC) frequency - 19.2MHz */ +#define CTC_FREQ 19200000 + +/* + * Set to true to use the fast SPI driver to boot, instead of mapped SPI. + * You also need to enable CONFIG_APL_SPI_FLASH_BOOT. + */ +#define BOOT_FROM_FAST_SPI_FLASH false + +/* + * We need to read well past the end of the region in order for execution from + * the loaded data to work. It is not clear why. + */ +#define SAFETY_MARGIN 0x4000 + +#define MAX_PCIE_PORTS 6 +#define CLKREQ_DISABLED 0xf + +#endif /* _ASM_ARCH_CPU_H */