TPL is at SRAM while other stage is at SDRAM, so it needs separate STACK.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Jagan Teki jagan@amarulasolutions.com ---
Changes in v2: None
arch/arm/mach-rockchip/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ec7104bf9e..3712e8af8d 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -95,6 +95,7 @@ config ROCKCHIP_RK3288 select TPL_LIBCOMMON_SUPPORT select TPL_LIBGENERIC_SUPPORT select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL + select TPL_NEEDS_SEPARATE_STACK if TPL select TPL_OF_CONTROL select TPL_OF_PLATDATA select TPL_RAM @@ -118,6 +119,9 @@ config TPL_TEXT_BASE config TPL_MAX_SIZE default 32768
+config TPL_STACK + default 0xff718000 + endif
config ROCKCHIP_RK3328