On Jul 21, 2010, at 4:56 PM, Timur Tabi wrote:
The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants.
The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz.
Also configure a pin muxing to select some SSI signals, which will disable I2C1.
Signed-off-by: Timur Tabi timur@freescale.com
board/freescale/p1022ds/p1022ds.c | 67 ++++++++++++++++++++++++++++++++----- doc/README.fsl-hwconfig | 21 +++++++++++ include/configs/P1022DS.h | 1 + 3 files changed, 80 insertions(+), 9 deletions(-) create mode 100644 doc/README.fsl-hwconfig
applied to 85xx
(fixed subject line)
- k