The boston memory map isn't suited to the simple "all memory starting from 0" approach that the MIPS arch_fixup_fdt() implementation takes. Instead we need to indicate the first 256MiB of DDR from 0 and the rest from 0x90000000. Implement ft_board_setup to do that.
Signed-off-by: Paul Burton paul.burton@imgtec.com ---
arch/mips/Kconfig | 1 + board/imgtec/boston/Makefile | 1 + board/imgtec/boston/dt.c | 27 +++++++++++++++++++++++++++ 3 files changed, 29 insertions(+) create mode 100644 board/imgtec/boston/dt.c
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b425414..9fa41e9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -83,6 +83,7 @@ config TARGET_BOSTON select MIPS_CM select MIPS_L1_CACHE_SHIFT_6 select MIPS_L2_CACHE + select OF_BOARD_SETUP select SUPPORTS_BIG_ENDIAN select SUPPORTS_LITTLE_ENDIAN select SUPPORTS_CPU_MIPS32_R1 diff --git a/board/imgtec/boston/Makefile b/board/imgtec/boston/Makefile index deda457..d3fd49d 100644 --- a/board/imgtec/boston/Makefile +++ b/board/imgtec/boston/Makefile @@ -6,4 +6,5 @@
obj-y += checkboard.o obj-y += ddr.o +obj-y += dt.o obj-y += lowlevel_init.o diff --git a/board/imgtec/boston/dt.c b/board/imgtec/boston/dt.c new file mode 100644 index 0000000..b34f9bc --- /dev/null +++ b/board/imgtec/boston/dt.c @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <fdt_support.h> + +int ft_board_setup(void *blob, bd_t *bd) +{ + DECLARE_GLOBAL_DATA_PTR; + u64 mem_start[2], mem_size[2]; + int mem_regions; + + mem_start[0] = 0; + mem_size[0] = min_t(u64, 256llu << 20, gd->ram_size); + mem_regions = 1; + + if (gd->ram_size > mem_size[0]) { + mem_start[1] = 0x80000000 + mem_size[0]; + mem_size[1] = gd->ram_size - mem_size[0]; + mem_regions++; + } + + return fdt_fixup_memory_banks(blob, mem_start, mem_size, mem_regions); +}