
-----Original Message----- From: Peng Fan (OSS) peng.fan@oss.nxp.com Sent: 2023年5月31日 9:37 To: Joy Zou joy.zou@nxp.com; Peng Fan peng.fan@nxp.com; Ye Li ye.li@nxp.com; sbabic@denx.de; festevam@gmail.com; sjg@chromium.org; saproj@gmail.com; judge.packham@gmail.com Cc: dl-uboot-imx uboot-imx@nxp.com; u-boot@lists.denx.de Subject: Re: [PATCH v1 2/3] imx: imx93_evk: add rtc pcf2131
On 5/30/2023 9:41 AM, Joy Zou wrote:
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support rtc pcf2131 for imx93.
Signed-off-by: Joy Zou joy.zou@nxp.com
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 8 ++++++++ arch/arm/dts/imx93-11x11-evk.dts | 25
++++++++++++++++++++++++
arch/arm/dts/imx93.dtsi | 2 +- 3 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi index 89e64344c6..4165a9b6b1 100644 --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi @@ -113,6 +113,10 @@ bootph-pre-ram; };
+&lpi2c3 {
u-boot,dm-spl;
+};
Do you need rtc in SPL stage or only in U-Boot proper?
only in U-Boot proper.
- &{/soc@0/bus@44000000/i2c@44350000/pmic@25} { bootph-pre-ram; };
@@ -125,6 +129,10 @@ bootph-pre-ram; };
+&pinctrl_lpi2c3 {
u-boot,dm-spl;
+};
Ditto.
only in U-Boot proper.
- &fec { phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>; phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts index b3a5a3d71e..421041757e 100644 --- a/arch/arm/dts/imx93-11x11-evk.dts +++ b/arch/arm/dts/imx93-11x11-evk.dts @@ -244,6 +244,24 @@ }; };
+&lpi2c3 {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <400000>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_lpi2c3>;
pinctrl-1 = <&pinctrl_lpi2c3>;
status = "okay";
pcf2131: rtc@53 {
compatible = "nxp,pcf2131";
reg = <0x53>;
interrupt-parent = <&pcal6524>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
status = "okay";
};
+};
&lpuart1 { /* console */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; @@ -461,6 +479,13 @@ >; };
pinctrl_lpi2c3: lpi2c3grp {
fsl,pins = <
MX93_PAD_GPIO_IO28__LPI2C3_SDA
0x40000b9e
MX93_PAD_GPIO_IO29__LPI2C3_SCL
0x40000b9e
>;
};
pinctrl_pcal6524: pcal6524grp { fsl,pins = < MX93_PAD_CCM_CLKO2__GPIO3_IO27
0x31e
diff --git a/arch/arm/dts/imx93.dtsi b/arch/arm/dts/imx93.dtsi index 28026ccecc..ac4b81c02f 100644 --- a/arch/arm/dts/imx93.dtsi +++ b/arch/arm/dts/imx93.dtsi @@ -319,7 +319,7 @@ reg = <0x42530000 0x10000>; interrupts = <GIC_SPI 62
IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk
IMX93_CLK_LPI2C3_GATE>,
<&clk
IMX93_CLK_LPI2C3_GATE>;
<&clk
IMX93_CLK_BUS_WAKEUP>;
What is this change for?
Because the lpi2c3 ipg clk only need bus_wakeup_clk_root according to the imx93 RM. Thanks peng! BR Joy Zou
Regards, Peng.
clock-names = "per", "ipg"; status = "disabled"; };
-- 2.37.1