The sdhci controller assumes that the base clock frequency is fully supported by the peripheral and doesn't support hardware limitations. Distinguish between base clock of the host controller and maximal supported peripheral clock frequency of the peripheral interface. This is needed for the zynq platform to support two sdhci ports with different IO routings.
Stefan Herbrechtsmeier (3): mmc: sdhci: Distinguish between base clock and maximum peripheral frequency mmc: zynq: Determine base clock frequency via clock framework mmc: zynq: Add fdt max-frequency support
arch/arm/mach-zynq/clk.c | 23 ++++++++++++++++++++ arch/arm/mach-zynq/include/mach/clk.h | 1 + drivers/mmc/atmel_sdhci.c | 7 ++++-- drivers/mmc/bcm2835_sdhci.c | 3 ++- drivers/mmc/ftsdc021_sdhci.c | 3 ++- drivers/mmc/kona_sdhci.c | 3 ++- drivers/mmc/msm_sdhci.c | 2 ++ drivers/mmc/mv_sdhci.c | 3 ++- drivers/mmc/pci_mmc.c | 1 + drivers/mmc/pic32_sdhci.c | 4 +++- drivers/mmc/rockchip_sdhci.c | 4 ++-- drivers/mmc/s5p_sdhci.c | 5 +++-- drivers/mmc/sdhci.c | 28 ++++++++++++------------ drivers/mmc/spear_sdhci.c | 3 ++- drivers/mmc/zynq_sdhci.c | 40 ++++++++++++++++++++++++++++++++++- include/sdhci.h | 13 ++++++------ 16 files changed, 111 insertions(+), 32 deletions(-)