With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with -u-boot.dtsi entries to include the pinmuxing in SPL, the manual code setting up the pinmux can go away. This patch removes the legacy pinmuxing code from the board file. Signed-off-by: Adam Ford aford173@gmail.com Reviewed-by: Fabio Estevam festevam@gmail.com diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 4bacd8660a..3c1a3a9fa2 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -42,32 +42,6 @@ int dram_init(void) return 0; }
-static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-static iomux_v3_cfg_t const uart2_pads[] = {
- MX6_PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD4_DAT5__UART2_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD4_DAT6__UART2_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-static iomux_v3_cfg_t const uart3_pads[] = {
- MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-static void setup_iomux_uart(void) -{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
- imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
- imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
-}
static iomux_v3_cfg_t const nand_pads[] = { MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), @@ -135,7 +109,6 @@ int overwrite_console(void)
int board_early_init_f(void) {
- setup_iomux_uart(); setup_nand_pins(); return 0;
} @@ -177,36 +150,6 @@ int spl_start_uboot(void) } #endif
-/* SD interface */ -#define USDHC_PAD_CTRL \
- (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)-static iomux_v3_cfg_t const usdhc1_pads[] = {
- MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-#ifdef CONFIG_FSL_ESDHC_IMX -struct fsl_esdhc_cfg usdhc_cfg[] = {
- {USDHC1_BASE_ADDR}, /* SOM */
- {USDHC2_BASE_ADDR} /* Baseboard */
-};
void board_boot_order(u32 *spl_boot_list) { struct src *psrc = (struct src *)SRC_BASE_ADDR; @@ -236,34 +179,6 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[2] = BOOT_DEVICE_BOARD; }
-int board_mmc_init(bd_t *bis) -{
- struct src *psrc = (struct src *)SRC_BASE_ADDR;
- unsigned int reg = readl(&psrc->sbmr1) >> 11;
- /*
* Upon reading BOOT_CFG register the following map is done:* Bit 11 and 12 of BOOT_CFG register can determine the current* mmc port* 0x1 SD1-SOM* 0x2 SD2-Baseboard*/- reg &= 0x3; /* Only care about bottom 2 bits */
- switch (reg) {
- case 0:
SETUP_IOMUX_PADS(usdhc1_pads);break;- case 1:
SETUP_IOMUX_PADS(usdhc2_pads);break;- }
- return 0;
-}
-#endif
static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic