Re: [U-Boot] [PATCH] powerpc/mpc8xxx: fix DDR data width checking

On Jun 27, 2011, at 3:35 PM, York Sun wrote:

Checking width before setting DDR controller. SPD for DDR1 and DDR2 has data width and primary sdram width. The latter one has different meaning for DDR3.

Signed-off-by: York Sun yorksun@freescale.com

arch/powerpc/cpu/mpc8xxx/ddr/options.c | 35 ++++++++++++++++++++++++------- 1 files changed, 27 insertions(+), 8 deletions(-)

applied

- k