On 09/12/2017 11:09 AM, Dr. Philipp Tomsich wrote:
Marek,
do you know whether there's an update of the DWC3 driver planned to get us back in sync with the kernel driver?
To my knowledge, no. Patches welcome.
btw please stop top-posting
Thanks, Philipp.
On 12 Sep 2017, at 07:02, Kever Yang kever.yang@rock-chips.com wrote:
Philipp,
I believe there are some request I think is not reasonable which stop me from update new patch sets.
The usb/dwc3 is mess up now, separate in host mode and gadget mode, one need init in board init
while another use DM. When I want to add a new feature like use 16bit UTMI+ instead of 8bit(which suppose to be very very simple),
I don't think the maintainer have an idea where it should go and how it should be, and the driver now
it's far away from upstream kernel.
I have send 4 patch set for this, everything should be clear, but...
Thanks,
- Kever
On 09/11/2017 09:30 PM, Philipp Tomsich wrote:
Kever,
What is the status on this patch (and the encapsulating series)? This seems to be stuck in 'changes requested' for about a year now...
Thanks, Philipp.
On Thu, 1 Sep 2016, Kever Yang wrote:
The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY, add one variable in dwc3/dwc3_device struct to support 16 bit UTMI+ interface on some SoCs like Rockchip rk3399.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Changes in v4:
- use 1 bit for usb2_phyif_utmi_width instead of 5bit
Changes in v3:
- Parse the DT for utmi+ interface width in dwc3 driver
Changes in v2:
- use a variable to identify utmi+ bus width instead of CONFIG MACRO
drivers/usb/dwc3/core.c | 19 +++++++++++++++++++ drivers/usb/dwc3/core.h | 12 ++++++++++++ 2 files changed, 31 insertions(+)