In message 1096026889.3318.40.camel@mhpajh5c you wrote:
However, the u-boot code writes zeros to the SCCM and doesn't touch CIMR. So I guess it's polling based, yes?
SDon;t guess. Read the source code. This is what you get it for.
Then the question is, do I simply skip steps 10-13? If I wanted to use interrupts instead of polling, what else would I need to change?
I have no idea what you are worrying about. Is there any problem with the existing MPC8xx drivers you're trying to fix?
specific for MPC852T, specifies that there is no BRG1 nor BRG2. The u-boot hard codes wiring BRG1 to the selected SCC. Why? Even more
Why not?
important: I have to obviously change it; is there more than one place I need to change (namely, replace cp_brgc1 with cp_brgc4)?
Really? There are several MPC866 based boards which run the existing code just fine.
Best regards,
Wolfgang Denk