
Hi Marek,
On jeu., sept. 27 2018, Marek Vasut marek.vasut@gmail.com wrote:
On 09/25/2018 03:01 PM, Gregory CLEMENT wrote:
Adding the support for 3 boards sharing common code:
- PCB120 and PCB 123 for Ocelot chip
- PCB 91 for Luton chip
Signed-off-by: Gregory CLEMENT gregory.clement@bootlin.com
board/mscc/common/board.c | 29 +++++++++++++++++++++++++++++ board/mscc/luton/Kconfig | 14 ++++++++++++++ board/mscc/luton/Makefile | 4 ++++ board/mscc/luton/luton.c | 14 ++++++++++++++ board/mscc/ocelot/Kconfig | 24 ++++++++++++++++++++++++ board/mscc/ocelot/Makefile | 5 +++++ board/mscc/ocelot/ocelot.c | 38 ++++++++++++++++++++++++++++++++++++++ 7 files changed, 128 insertions(+) create mode 100644 board/mscc/common/board.c create mode 100644 board/mscc/luton/Kconfig create mode 100644 board/mscc/luton/Makefile create mode 100644 board/mscc/luton/luton.c create mode 100644 board/mscc/ocelot/Kconfig create mode 100644 board/mscc/ocelot/Makefile create mode 100644 board/mscc/ocelot/ocelot.c
diff --git a/board/mscc/common/board.c b/board/mscc/common/board.c new file mode 100644 index 0000000000..86e7bf3353 --- /dev/null +++ b/board/mscc/common/board.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2018 Microsemi Corporation
- */
+#include <common.h> +#include <asm/io.h> +#include <asm/addrspace.h> +#include <asm/types.h> +#include <environment.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_r(void) +{
- u32 ctrl;
- /* Prepare SPI controller to be used in master mode */
- writel(0, REG_CFG(ICPU_SW_MODE));
- ctrl = readl(REG_CFG(ICPU_GENERAL_CTRL));
- writel((ctrl & ~ICPU_GENERAL_CTRL_IF_SI_OWNER_M) |
ICPU_GENERAL_CTRL_IF_SI_OWNER(2),
REG_CFG(ICPU_GENERAL_CTRL));
This can be replaced by one of the clrsetbits stuff.
I used the clrsetbits family everywhere it was possible now.
[...]
+++ b/board/mscc/luton/luton.c @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2018 Microsemi Corporation
- */
+#include <common.h> +#include <asm/io.h>
+void board_debug_uart_init(void) +{
- /* too early for the pinctrl driver, so configure the UART pins here */
- writel(BIT(30)|BIT(31), REG_GCB((0x68+8*4)));
- writel(~(BIT(30)|BIT(31)), REG_GCB((0x68+9*4)));
Can this ad-hoc random address be replaced by a macro ?
Done!
Gregory
[...]
-- Best regards, Marek Vasut