From: Stefan Roese sr@denx.de
This change is needed to compile the PPC4xx NAND booting targets equipped with the IBM DDR2 SDRAM controller.
Signed-off-by: Stefan Roese sr@denx.de Cc: Wolfgang Denk wd@denx.de --- Stefan, if it's OK with you I will pull this directly.
board/amcc/canyonlands/canyonlands.c | 12 ------------ 1 files changed, 0 insertions(+), 12 deletions(-)
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index faa3720..80e2739 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -363,18 +363,6 @@ int checkboard(void) } #endif /* !defined(CONFIG_ARCHES) */
-#if defined(CONFIG_NAND_U_BOOT) -/* - * NAND booting U-Boot version uses a fixed initialization, since the whole - * I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot - * code. - */ -phys_size_t initdram(int board_type) -{ - return CONFIG_SYS_MBYTES_SDRAM << 20; -} -#endif - #if defined(CONFIG_PCI) int board_pcie_first(void) {