The input system clock for mt7622 timer is 10MHz and can be retrieved through the clk driver.
Signed-off-by: Weijie Gao weijie.gao@mediatek.com --- arch/arm/dts/mt7622.dtsi | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi index d888545809..5c2e0251de 100644 --- a/arch/arm/dts/mt7622.dtsi +++ b/arch/arm/dts/mt7622.dtsi @@ -71,16 +71,10 @@ compatible = "mediatek,timer"; reg = <0x10004000 0x80>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>; - clocks = <&system_clk>; + clocks = <&infracfg CLK_INFRA_APXGPT_PD>; clock-names = "system-clk"; };
- system_clk: dummy13m { - compatible = "fixed-clock"; - clock-frequency = <13000000>; - #clock-cells = <0>; - }; - infracfg: infracfg@10000000 { compatible = "mediatek,mt7622-infracfg", "syscon";