/soc@0 aips1 aips2 aips3 clk iomuxc osc_24m
are common node enablements across imx8mm platform for dm-spi, dm-pre-reloc stages.
Move them into common dtsi, imx8mm-u-boot.dtsi
Cc: Adam Ford aford173@gmail.com Cc: Peng Fan peng.fan@nxp.com Cc: Teresa Remmet t.remmet@phytec.de Cc: Igor Opaniuk igor.opaniuk@toradex.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 37 ++------------------ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 37 ++------------------ arch/arm/dts/imx8mm-u-boot.dtsi | 39 ++++++++++++++++++++++ arch/arm/dts/imx8mm-verdin-u-boot.dtsi | 38 ++------------------- arch/arm/dts/phycore-imx8mm-u-boot.dtsi | 37 ++------------------ 5 files changed, 48 insertions(+), 140 deletions(-) create mode 100644 arch/arm/dts/imx8mm-u-boot.dtsi
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index 6d80a529ae..73ddfdade6 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright 2020 Compass Electronics Group, LLC */
+#include "imx8mm-u-boot.dtsi" + / { wdt-reboot { compatible = "wdt-reboot"; @@ -11,32 +13,6 @@ }; };
-&{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; -}; - -&aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips2 { - u-boot,dm-spl; -}; - -&aips3 { - u-boot,dm-spl; -}; - -&clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; }; @@ -65,15 +41,6 @@ u-boot,dm-spl; };
-&iomuxc { - u-boot,dm-spl; -}; - -&osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - &pca6416_0 { compatible = "ti,tca6416"; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index e843a5648e..79dffe7ccd 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright 2019 NXP */
+#include "imx8mm-u-boot.dtsi" + / { wdt-reboot { compatible = "wdt-reboot"; @@ -11,41 +13,6 @@ }; };
-&{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; -}; - -&clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - -&osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips2 { - u-boot,dm-spl; -}; - -&aips3 { - u-boot,dm-spl; -}; - -&iomuxc { - u-boot,dm-spl; -}; - ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; }; diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi new file mode 100644 index 0000000000..f833d9df59 --- /dev/null +++ b/arch/arm/dts/imx8mm-u-boot.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Jagan Teki jagan@amarulasolutions.com + */ + +&{/soc@0} { + u-boot,dm-pre-reloc; + u-boot,dm-spl; +}; + +&aips1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips2 { + u-boot,dm-spl; +}; + +&aips3 { + u-boot,dm-spl; +}; + +&clk { + u-boot,dm-spl; + u-boot,dm-pre-reloc; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +&osc_24m { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi index 249b0f8f66..67c31c49b6 100644 --- a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi @@ -2,6 +2,9 @@ /* * Copyright 2020 Toradex */ + +#include "imx8mm-u-boot.dtsi" + / { wdt-reboot { compatible = "wdt-reboot"; @@ -10,27 +13,6 @@ }; };
-&aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips2 { - u-boot,dm-spl; -}; - -&aips3 { - u-boot,dm-spl; -}; - -&clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - &gpio1 { u-boot,dm-spl; }; @@ -55,15 +37,6 @@ u-boot,dm-spl; };
-&iomuxc { - u-boot,dm-spl; -}; - -&osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - &pinctrl_i2c1 { u-boot,dm-spl; }; @@ -84,11 +57,6 @@ u-boot,dm-spl; };
-&{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; -}; - &{/soc@0/bus@30800000/i2c@30a20000/pmic} { u-boot,dm-spl; }; diff --git a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi index fc0fa22d1b..91515b8df9 100644 --- a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi +++ b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi @@ -4,6 +4,8 @@ * Author: Teresa Remmet t.remmet@phytec.de */
+#include "imx8mm-u-boot.dtsi" + / { wdt-reboot { compatible = "wdt-reboot"; @@ -12,41 +14,6 @@ }; };
-&{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; -}; - -&clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - -&osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; -}; - -&aips2 { - u-boot,dm-spl; -}; - -&aips3 { - u-boot,dm-spl; -}; - -&iomuxc { - u-boot,dm-spl; -}; - &pinctrl_uart3 { u-boot,dm-spl; };