Hi Simon,
On Wed, Apr 7, 2021 at 12:33 PM Simon Glass sjg@chromium.org wrote:
Add information about memory usage when U-Boot is started from coreboot. This is useful when debugging. Also, since coreboot takes a chunk of memory in the middle of SDRAM for use by PCI devices, it can help avoid overwriting this with a loaded kernel by accident.
Signed-off-by: Simon Glass sjg@chromium.org
doc/board/coreboot/coreboot.rst | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst index 9c44c025a48..e791b7e39f0 100644 --- a/doc/board/coreboot/coreboot.rst +++ b/doc/board/coreboot/coreboot.rst @@ -50,3 +50,22 @@ works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It can be useful for running UEFI applications, for example.
This has only been lightly tested.
+Memory map +----------
+::
Can we use the reST table syntax for the following table?
- ffffffff Top of ROM (and last byte of 32-bit address space)
- 7a9fd000 Typical top of memory available to U-Boot
(use cbsysinfo to see where memory range 'table' starts)- 10000000 Memory reserved by coreboot for mapping PCI devices
(typical size 2151000, includes framebuffer)1920000 CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup1110000 CONFIG_SYS_TEXT_BASE (start address of U-Boot code, before reloc)110000 CONFIG_BLOBLIST_ADDR (before being relocated)100000 CONFIG_PRE_CON_BUF_ADDRf0000 ACPI tables set up by U-Boot(typically redirects to 7ab10030 or similar)500 Location of coreboot sysinfo table, used during startup--
Regards, Bin