Wolfgang Denk wrote:
Dear Stefano Babic,
In message 1286875504-9058-4-git-send-email-sbabic@denx.de you wrote:
Add framebuffer driver for the MX51 processor working on the IPUv3 internal graphic processor.
Please add reference to original sources.
Ok
+/*
- Allocates the DRAM memory for the frame buffer. This buffer is remapped
- into a non-cached, non-buffered, memory region to allow palette and pixel
- writes to occur without flushing the cache. Once this area is remapped,
- all virtual memory access to the video memory should occur at the new region.
Is this comment still valid for the U-Boot port?
No, it is not. The comment makes no sense for u-boot. There is no allocation and malloc is not called, as the memory for the framebuffer is taken from the lcd_base variable.
Does it work with both "dcache on" and "dcache off" settings?
Well, as there is not yet support for L2-Cache on the MX51, we can say yes ;-). However, this range of memory is used directly from the IPU processor and not by the CPU, as well as in Linux without calling any function to invalidate the cache. But I agree, it should be tested again when support for L2-cache will be integrated.
Stefano