From: Chee Hong Ang chee.hong.ang@intel.com
Allow socfpga_bridges_reset() function in Reset Manager driver to access System Manager's register in non-secure mode (EL2).
Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com --- arch/arm/mach-socfpga/reset_manager_s10.c | 31 ++++++++++++++++++------------- 1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c index c743077..d03f121 100644 --- a/arch/arm/mach-socfpga/reset_manager_s10.c +++ b/arch/arm/mach-socfpga/reset_manager_s10.c @@ -7,6 +7,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/reset_manager.h> +#include <asm/arch/secure_reg_helper.h> #include <asm/arch/system_manager.h> #include <dt-bindings/reset/altr,rst-mgr-s10.h>
@@ -56,34 +57,37 @@ void socfpga_bridges_reset(int enable) { if (enable) { /* clear idle request to all bridges */ - setbits_le32(socfpga_get_sysmgr_addr() + - SYSMGR_SOC64_NOC_IDLEREQ_CLR, ~0); + socfpga_secure_reg_update32(socfpga_get_sysmgr_addr() + + SYSMGR_SOC64_NOC_IDLEREQ_CLR, + ~0, ~0);
/* Release all bridges from reset state */ clrbits_le32(socfpga_get_rstmgr_addr() + RSTMGR_SOC64_BRGMODRST, ~0);
/* Poll until all idleack to 0 */ - while (readl(socfpga_get_sysmgr_addr() + - SYSMGR_SOC64_NOC_IDLEACK)) + while (socfpga_secure_reg_read32(socfpga_get_sysmgr_addr() + + SYSMGR_SOC64_NOC_IDLEACK)) ; } else { /* set idle request to all bridges */ - writel(~0, - socfpga_get_sysmgr_addr() + - SYSMGR_SOC64_NOC_IDLEREQ_SET); + socfpga_secure_reg_write32(~0, socfpga_get_sysmgr_addr() + + SYSMGR_SOC64_NOC_IDLEREQ_SET);
/* Enable the NOC timeout */ - writel(1, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_TIMEOUT); + socfpga_secure_reg_write32(1, socfpga_get_sysmgr_addr() + + SYSMGR_SOC64_NOC_TIMEOUT);
/* Poll until all idleack to 1 */ - while ((readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_IDLEACK) ^ - (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK))) + while ((socfpga_secure_reg_read32(socfpga_get_sysmgr_addr() + + SYSMGR_SOC64_NOC_IDLEACK) ^ (SYSMGR_NOC_H2F_MSK | + SYSMGR_NOC_LWH2F_MSK))) ;
/* Poll until all idlestatus to 1 */ - while ((readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_IDLESTATUS) ^ - (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK))) + while ((socfpga_secure_reg_read32(socfpga_get_sysmgr_addr() + + SYSMGR_SOC64_NOC_IDLESTATUS) ^ (SYSMGR_NOC_H2F_MSK | + SYSMGR_NOC_LWH2F_MSK))) ;
/* Reset all bridges (except NOR DDR scheduler & F2S) */ @@ -92,7 +96,8 @@ void socfpga_bridges_reset(int enable) RSTMGR_BRGMODRST_FPGA2SOC_MASK));
/* Disable NOC timeout */ - writel(0, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_TIMEOUT); + socfpga_secure_reg_write32(0, socfpga_get_sysmgr_addr() + + SYSMGR_SOC64_NOC_TIMEOUT); } }