On Thu, 17 Aug 2017, Paweł Jarosz wrote:
Add core skeleton for rk3066
Signed-off-by: Paweł Jarosz paweljarosz3691@gmail.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
See below for a few comments.
Changes since v1:
- updated to shifted masks
- moved syscon.h below spl.h
- changed error to debug and return error reason
- changed Cortex-A7 to Cortex-A9
- added nand support
- added dfu support
- removed dram_init
- reset timer before enable
- moved configs to board config file
- moved arm clk setup to tpl
- moved ddr setup to tpl
- moved to boot device bootrom
Changes since v2:
- none
Changes since v3:
- none
arch/arm/mach-rockchip/Kconfig | 16 +++ arch/arm/mach-rockchip/Makefile | 4 + arch/arm/mach-rockchip/rk3066-board-spl.c | 139 ++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3066-board-tpl.c | 90 ++++++++++++++++ arch/arm/mach-rockchip/rk3066-board.c | 150 ++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3066/Kconfig | 31 ++++++ arch/arm/mach-rockchip/rk3066/Makefile | 8 ++ arch/arm/mach-rockchip/rk3066/clk_rk3066.c | 33 ++++++ arch/arm/mach-rockchip/rk3066/syscon_rk3066.c | 54 ++++++++++ include/configs/rk3066_common.h | 99 +++++++++++++++++ 10 files changed, 624 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3066-board-spl.c create mode 100644 arch/arm/mach-rockchip/rk3066-board-tpl.c create mode 100644 arch/arm/mach-rockchip/rk3066-board.c create mode 100644 arch/arm/mach-rockchip/rk3066/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3066/Makefile create mode 100644 arch/arm/mach-rockchip/rk3066/clk_rk3066.c create mode 100644 arch/arm/mach-rockchip/rk3066/syscon_rk3066.c create mode 100644 include/configs/rk3066_common.h
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d9b25d5..810353f 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -11,6 +11,21 @@ config ROCKCHIP_RK3036 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+config ROCKCHIP_RK3066
- bool "Support Rockchip RK3066"
- select CPU_V7
- select SUPPORT_SPL
- select SUPPORT_TPL
- select SPL
- select TPL
- select BOARD_LATE_INIT
- select ROCKCHIP_BROM_HELPER
- help
The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9including NEON and GPU, Mali-400 graphics, several DDR3 optionsand video codec support. Peripherals include ethernet, USB2 hostand OTG, SDIO, I2S, UART, SPI, I2C and PWMs.config ROCKCHIP_RK3188 bool "Support Rockchip RK3188" select CPU_V7 @@ -164,6 +179,7 @@ config SPL_MMC_SUPPORT default y if !SPL_ROCKCHIP_BACK_TO_BROM
source "arch/arm/mach-rockchip/rk3036/Kconfig" +source "arch/arm/mach-rockchip/rk3066/Kconfig" source "arch/arm/mach-rockchip/rk3188/Kconfig" source "arch/arm/mach-rockchip/rk322x/Kconfig" source "arch/arm/mach-rockchip/rk3288/Kconfig" diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 79e9704..ae878ef 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -11,10 +11,12 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o +obj-spl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o @@ -22,6 +24,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) +obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o @@ -35,6 +38,7 @@ obj-y += rk_timer.o endif
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/ +obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/ ifndef CONFIG_TPL_BUILD obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/ endif diff --git a/arch/arm/mach-rockchip/rk3066-board-spl.c b/arch/arm/mach-rockchip/rk3066-board-spl.c new file mode 100644 index 0000000..9acdd83 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3066-board-spl.c @@ -0,0 +1,139 @@ +/*
- (C) Copyright 2015 Google, Inc
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <clk.h> +#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <fdtdec.h> +#include <led.h> +#include <malloc.h> +#include <ram.h> +#include <spl.h> +#include <syscon.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/bootrom.h> +#include <asm/arch/clock.h> +#include <asm/arch/hardware.h> +#include <asm/arch/periph.h> +#include <asm/arch/pmu_rk3188.h> +#include <asm/arch/sdram.h> +#include <asm/arch/timer.h> +#include <dm/pinctrl.h> +#include <dm/root.h> +#include <dm/test.h> +#include <dm/util.h> +#include <power/regulator.h>
+DECLARE_GLOBAL_DATA_PTR;
+u32 spl_boot_device(void) +{
- return BOOT_DEVICE_NAND;
+}
+void board_init_f(ulong dummy) +{
- struct udevice *pinctrl, *dev;
- int ret;
- debug_uart_init();
- ret = spl_early_init();
- if (ret) {
debug("spl_early_init() failed: %d\n", ret);hang();- }
- ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
- if (ret) {
debug("Pinctrl init failed: %d\n", ret);return;- }
- ret = rockchip_get_clk(&dev);
- if (ret) {
debug("CLK init failed: %d\n", ret);return;- }
- ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
debug("DRAM init failed: %d\n", ret);return;- }
+}
+void spl_board_init(void) +{
- struct udevice *pinctrl;
- int ret;
- ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
- if (ret) {
debug("%s: Cannot find pinctrl device\n", __func__);goto err;- }
+#ifdef CONFIG_SPL_MMC_SUPPORT
- ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
- if (ret) {
debug("%s: Failed to set up SD card\n", __func__);goto err;- }
+#endif
- /* Enable debug UART */
- ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
- if (ret) {
debug("%s: Failed to set up console UART\n", __func__);goto err;- }
- preloader_console_init();
- return;
+err:
- debug("spl_board_init: Error %d\n", ret);
- /* No way to report error here */
- hang();
+}
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include <usb.h> +#include <usb/dwc2_udc.h>
+static struct dwc2_plat_otg_data rk3066_otg_data = {
- .rx_fifo_sz = 275,
- .np_tx_fifo_sz = 16,
- .tx_fifo_sz = 256,
+};
+int board_usb_init(int index, enum usb_init_type init) +{
- ofnode otg_node;
- u32 reg;
- otg_node = ofnode_path("/usb@10180000");
- if (!ofnode_valid(otg_node)) {
debug("Not found usb otg device\n");return -ENODEV;- }
- ofnode_read_u32(otg_node, "reg", ®);
- rk3066_otg_data.regs_otg = reg;
- return dwc2_udc_probe(&rk3066_otg_data);
+}
+int board_usb_cleanup(int index, enum usb_init_type init) +{
- return 0;
+} +#endif diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c new file mode 100644 index 0000000..5dcac90 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3066-board-tpl.c @@ -0,0 +1,90 @@ +/*
- (C) Copyright 2015 Google, Inc
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <clk.h> +#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <ram.h> +#include <spl.h> +#include <asm/io.h> +#include <asm/arch/bootrom.h> +#include <asm/arch/clock.h> +#include <asm/arch/ddr_rk3188.h> +#include <asm/arch/hardware.h> +#include <asm/arch/grf_rk3066.h> +#include <asm/arch/pmu_rk3188.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define RK3066_TIMER_CONTROL 0x8 +#define GRF_BASE 0x20008000
+static int setup_arm_clock(void) +{
- struct udevice *dev;
- struct clk clk;
- int ret;
- ret = rockchip_get_clk(&dev);
- if (ret)
return ret;- clk.id = CLK_ARM;
- ret = clk_request(dev, &clk);
- if (ret < 0)
return ret;- ret = clk_set_rate(&clk, 600000000);
- clk_free(&clk);
- return ret;
+}
+void board_init_f(ulong dummy) +{
- struct rk3066_grf * const grf = (void *)GRF_BASE;
- struct udevice *dev;
- int ret;
- /* Enable early UART on the RK3066 */
- rk_clrsetreg(&grf->gpio1b_iomux,
GPIO1B1_MASK | GPIO1B0_MASK,GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
You should consider putting the pinmux-setting into board_debug_uart_init and selecting DEBUG_UART_BOARD_INIT.
I'd prefer this to be changed (especially, as it is done so early that it needs the GRF_BASE as a constant).
- debug_uart_init();
- printascii("U-Boot TPL board init\n");
- ret = spl_early_init();
- if (ret) {
debug("spl_early_init() failed: %d\n", ret);hang();- }
- /* Reset and enable Timer0 */
- writel(0, CONFIG_SYS_TIMER_BASE);
- rk_clrsetreg(CONFIG_SYS_TIMER_BASE + RK3066_TIMER_CONTROL, 0x1, 0x1);
I recently added timer/rockchip_timer.c (it still needs some upstream patches to be merged to be useful for 32bit devices, as the OF_PLATDATA handling is 64bit specific), which should allow you to rely on the DM to initialise the driver (i.e. no explicit initialisation necessary).
No change needed at this time (I'll merge this as is), but I'd prefer this to be migrated on the 32/64bit weirdness is resolved.
- ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
debug("DRAM init failed: %d\n", ret);return;- }
- setup_arm_clock();
+}
+void board_return_to_bootrom(void) +{
- back_to_bootrom();
+}
+u32 spl_boot_device(void) +{
- return BOOT_DEVICE_BOOTROM;
+} diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c new file mode 100644 index 0000000..8fa06a2 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3066-board.c @@ -0,0 +1,150 @@ +/*
- (C) Copyright 2017 Paweł Jarosz paweljarosz3691@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <clk.h> +#include <dm.h> +#include <ram.h> +#include <syscon.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/grf_rk3066.h> +#include <asm/arch/periph.h> +#include <asm/arch/pmu_rk3188.h> +#include <asm/arch/boot_mode.h> +#include <asm/gpio.h> +#include <dm/pinctrl.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_late_init(void) +{
- struct rk3066_grf *grf;
- grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
- if (IS_ERR(grf)) {
debug("grf syscon returned %ld\n", PTR_ERR(grf));return PTR_ERR(grf);- }
- /* enable noc remap to mimic legacy loaders */
- rk_clrsetreg(&grf->soc_con0, NOC_REMAP_MASK, NOC_REMAP_MASK);
- return 0;
+}
+int board_init(void) +{ +#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
Could this simply be "always on"? Or am I missing something here?
- struct udevice *pinctrl;
- int ret;
- /*
* We need to implement sdcard iomux here for the further* initialization, otherwise, it'll hit sdcard command sending* timeout exception.*/- ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
- if (ret) {
debug("%s: Cannot find pinctrl device\n", __func__);goto err;- }
- ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
- if (ret) {
debug("%s: Failed to set up SD card\n", __func__);goto err;- }
- return 0;
+err:
- debug("board_init: Error %d\n", ret);
- /* No way to report error here */
- hang();
- return -1;
+#else
- return 0;
+#endif +}
+#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
+} +#endif
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include <usb.h> +#include <usb/dwc2_udc.h>
+static struct dwc2_plat_otg_data rk3066_otg_data = {
- .rx_fifo_sz = 275,
- .np_tx_fifo_sz = 16,
- .tx_fifo_sz = 256,
+};
+int board_usb_init(int index, enum usb_init_type init) +{
- int node, phy_node;
- const char *mode;
- bool matched = false;
- const void *blob = gd->fdt_blob;
- u32 grf_phy_offset;
- /* find the usb_otg node */
- node = fdt_node_offset_by_compatible(blob, -1,
"rockchip,rk3066-usb");- while (node > 0) {
mode = fdt_getprop(blob, node, "dr_mode", NULL);if (mode && strcmp(mode, "otg") == 0) {matched = true;break;}node = fdt_node_offset_by_compatible(blob, node,"rockchip,rk3066-usb");- }
- if (!matched) {
debug("Not found usb_otg device\n");return -ENODEV;- }
- rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
- node = fdtdec_lookup_phandle(blob, node, "phys");
- if (node <= 0) {
debug("Not found usb phy device\n");return -ENODEV;- }
- phy_node = fdt_parent_offset(blob, node);
- if (phy_node <= 0) {
debug("Not found usb phy device\n");return -ENODEV;- }
- rk3066_otg_data.phy_of_node = phy_node;
- grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
- node = fdt_node_offset_by_compatible(blob, -1,
"rockchip,rk3066-grf");- if (node <= 0) {
debug("Not found grf device\n");return -ENODEV;- }
- rk3066_otg_data.regs_phy = grf_phy_offset +
fdtdec_get_addr(blob, node, "reg");- return dwc2_udc_probe(&rk3066_otg_data);
+}
+int board_usb_cleanup(int index, enum usb_init_type init) +{
- return 0;
+} +#endif diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig new file mode 100644 index 0000000..b5277fe --- /dev/null +++ b/arch/arm/mach-rockchip/rk3066/Kconfig @@ -0,0 +1,31 @@ +if ROCKCHIP_RK3066
+config TARGET_MK808_RK3066
bool "MK808_RK3066"- help
MK808 is a tv stick with usb host and otg, microsd card slot, hdmi and wifi.+config SYS_SOC
default "rockchip"+config SYS_MALLOC_F_LEN
default 0x0800+config SPL_LIBCOMMON_SUPPORT
default y+config SPL_LIBGENERIC_SUPPORT
default y+config SPL_SERIAL_SUPPORT
default y+config TPL_LIBCOMMON_SUPPORT
default y+config TPL_LIBGENERIC_SUPPORT
default y+source "board/rikomagic/mk808_rk3066/Kconfig"
+endif diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile new file mode 100644 index 0000000..61b7fd4 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3066/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (c) 2017 Paweł Jarosz paweljarosz3691@gmail.com +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y += clk_rk3066.o +obj-y += syscon_rk3066.o diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c new file mode 100644 index 0000000..ae52902 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c @@ -0,0 +1,33 @@ +/*
- Copyright (C) 2016 Google, Inc
- Written by Simon Glass sjg@chromium.org
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <dm.h> +#include <syscon.h> +#include <asm/arch/clock.h> +#include <asm/arch/cru_rk3066.h>
+int rockchip_get_clk(struct udevice **devp) +{
- return uclass_get_device_by_driver(UCLASS_CLK,
DM_GET_DRIVER(rockchip_rk3066a_cru), devp);+}
+void *rockchip_get_cru(void) +{
- struct rk3066_clk_priv *priv;
- struct udevice *dev;
- int ret;
- ret = rockchip_get_clk(&dev);
- if (ret)
return ERR_PTR(ret);- priv = dev_get_priv(dev);
- return priv->cru;
+} diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c new file mode 100644 index 0000000..57b2376 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c @@ -0,0 +1,54 @@ +/*
- (C) Copyright 2015 Rockchip Electronics Co., Ltd
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <dm.h> +#include <syscon.h> +#include <asm/arch/clock.h>
+static const struct udevice_id rk3066_syscon_ids[] = {
- { .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC },
- { .compatible = "rockchip,rk3066-grf", .data = ROCKCHIP_SYSCON_GRF },
- { .compatible = "rockchip,rk3066-pmu", .data = ROCKCHIP_SYSCON_PMU },
- { }
+};
+U_BOOT_DRIVER(syscon_rk3066) = {
- .name = "rk3066_syscon",
- .id = UCLASS_SYSCON,
- .of_match = rk3066_syscon_ids,
+};
+#if CONFIG_IS_ENABLED(OF_PLATDATA) +static int rk3066_syscon_bind_of_platdata(struct udevice *dev) +{
- dev->driver_data = dev->driver->of_match->data;
- debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
- return 0;
+}
+U_BOOT_DRIVER(rockchip_rk3188_noc) = {
- .name = "rockchip_rk3188_noc",
- .id = UCLASS_SYSCON,
- .of_match = rk3066_syscon_ids,
- .bind = rk3066_syscon_bind_of_platdata,
+};
+U_BOOT_DRIVER(rockchip_rk3066_grf) = {
- .name = "rockchip_rk3066_grf",
- .id = UCLASS_SYSCON,
- .of_match = rk3066_syscon_ids + 1,
- .bind = rk3066_syscon_bind_of_platdata,
+};
+U_BOOT_DRIVER(rockchip_rk3066_pmu) = {
- .name = "rockchip_rk3066_pmu",
- .id = UCLASS_SYSCON,
- .of_match = rk3066_syscon_ids + 2,
- .bind = rk3066_syscon_bind_of_platdata,
+}; +#endif diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h new file mode 100644 index 0000000..3d8c9e8 --- /dev/null +++ b/include/configs/rk3066_common.h @@ -0,0 +1,99 @@ +/*
- Copyright (c) 2017 Paweł Jarosz paweljarosz3691@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __CONFIG_RK3066_COMMON_H +#define __CONFIG_RK3066_COMMON_H
+#include <asm/arch/hardware.h> +#include "rockchip-common.h"
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x2000
With Simon's migration of the various ENV configuration items to Kconfig merged: this should also be migrated.
+#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_MALLOC_LEN (64 << 20) +#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CONFIG_NR_DRAM_BANKS 1 +#define SDRAM_BANK_SIZE (1024UL << 20UL) +#define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
+#define CONFIG_SYS_TIMER_RATE 24000000 +#define CONFIG_SYS_TIMER_BASE 0x20038000
Once/if you can move to DM timer, these should become obsolete.
+#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 4) +#define CONFIG_SYS_TIMER_COUNTS_DOWN
+#define CONFIG_SYS_TEXT_BASE 0x60408000 +#define CONFIG_SYS_INIT_SP_ADDR 0x78000000 +#define CONFIG_SYS_LOAD_ADDR 0x70800800
+#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SYS_MAX_NAND_DEVICE 8
+#ifdef CONFIG_TPL_BUILD +#define CONFIG_SPL_TEXT_BASE 0x10080C04 +#define CONFIG_SPL_STACK 0x1008FFFF
The TPL variants of these can now be set via Kconfig. arch/arm/mach-rockchip/Kconfig has an example of this for the RK3368.
+/* tpl size max 32kb - 4byte RK30 header */ +#define CONFIG_SPL_MAX_SIZE (0x8000 - 0x4) +#elif defined(CONFIG_SPL_BUILD) +/* spl size max 200k */ +#define CONFIG_SPL_MAX_SIZE 0x32000 +#define CONFIG_SPL_TEXT_BASE 0x60000000 +#define CONFIG_SPL_STACK 0x1008FFFF +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_LOAD +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_INIT +#define CONFIG_SPL_NAND_BBT +#define CONFIG_SPL_NAND_IDS +#define CONFIG_SPL_NAND_UTIL +#define CONFIG_SPL_NAND_RAW_ONLY +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 +#define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS +#define CONFIG_MTD_DEVICE +#endif
+#include <config_distro_defaults.h>
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_MTD_DEVICE +#define MTDIDS_DEFAULT "nand0=rockchip-nand.0"
+#define ENV_MEM_LAYOUT_SETTINGS \
- "scriptaddr=0x60000000\0" \
- "pxefile_addr_r=0x60100000\0" \
- "fdt_addr_r=0x61f00000\0" \
- "kernel_addr_r=0x62000000\0" \
- "ramdisk_addr_r=0x64000000\0"
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
- "fdt_high=0x6fffffff\0" \
- "initrd_high=0x6fffffff\0" \
- "partitions=" PARTS_DEFAULT \
- "mtdids=" MTDIDS_DEFAULT "\0" \
- ENV_MEM_LAYOUT_SETTINGS \
- ROCKCHIP_DEVICE_SETTINGS \
- BOOTENV
+#endif
+#define CONFIG_PREBOOT
+#endif