According to at24c32 datasheet:
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the dataword address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition.
BYTE WRITE: A write operation requires two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word.
From this, my understanding is that dataword is 1 byte, and when reading the
offset is just 1 byte.
By having an offset len of 2 bytes, reading from the eeprom at boot time to read the stored MAC address fails on sam9x60ek board which has this eeprom.
When changing the offset len to 1 byte, reading the MAC address from the offset inside the EEPROM works correctly.
Fixes: 821c982e35 ("misc: i2c_eeprom: set offset len and chip addr offset mask") Reported-by: Sergiu Moga sergiu.moga@microchip.com Signed-off-by: Eugen Hristev eugen.hristev@microchip.com Tested-by: Claudiu Beznea claudiu.beznea@microchip.com ---
Hi everyone,
We tested this on sam9x60ek board. I see in DT that various other boards use this eeprom. I have added several people to the patch e-mail, however not comprehensively everyone. I do not wish to affect functionality for other boards, even though this patch appears correct. Some other tests would be welcome, on other boards having this EEPROM.
Thanks! Eugen
drivers/misc/i2c_eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 89a450d0f8..c8c67cf028 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -230,7 +230,7 @@ static const struct i2c_eeprom_drv_data atmel24c32_data = { .size = 4096, .pagesize = 32, .addr_offset_mask = 0, - .offset_len = 2, + .offset_len = 1, };
static const struct i2c_eeprom_drv_data atmel24c64_data = {