From 58a5b320de8f9faf0993f292b4c1e6e5b2685109 Mon Sep 17 00:00:00 2001
From: Markus Hubig <mhubig@imko.de>
Date: Wed, 11 Jul 2012 19:34:34 +0200
Subject: [PATCH 2/3] First try to adapt the old patch to the new uboot.

The Board is booting into u-boot but shows a "Caches not enabled"
warning and restarts after son seconds ...

Signed-off-by: Markus Hubig <mhubig@imko.de>
---
 board/taskit/stamp9G20/Makefile    |   16 ++--
 board/taskit/stamp9G20/config.mk   |    1 -
 board/taskit/stamp9G20/led.c       |    9 +-
 board/taskit/stamp9G20/partition.c |    4 +
 board/taskit/stamp9G20/stamp9G20.c |  126 ++++++++++++++++------------
 boards.cfg                         |    4 +-
 include/configs/stamp9G20.h        |  158 +++++++++++++++++++++---------------
 7 files changed, 183 insertions(+), 135 deletions(-)
 delete mode 100644 board/taskit/stamp9G20/config.mk

diff --git a/board/taskit/stamp9G20/Makefile b/board/taskit/stamp9G20/Makefile
index ef82428..a32a35c 100644
--- a/board/taskit/stamp9G20/Makefile
+++ b/board/taskit/stamp9G20/Makefile
@@ -3,9 +3,13 @@
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # (C) Copyright 2008
-# Stelian Pop <stelian.pop@leadtechdesign.com>
+# Stelian Pop <stelian@popies.net>
 # Lead Tech Design <www.leadtechdesign.com>
 #
+# (C) Copyright 2012
+# Markus Hubig <mhubig@imko.de>
+# IMKO GmbH <www.imko.de>
+#
 # See file CREDITS for list of people who contributed to this
 # project.
 #
@@ -27,7 +31,7 @@
 
 include $(TOPDIR)/config.mk
 
-LIB	= $(obj)lib$(BOARD).a
+LIB	= $(obj)lib$(BOARD).o
 
 COBJS-y	+= stamp9G20.o
 COBJS-y	+= led.o
@@ -38,13 +42,7 @@ OBJS	:= $(addprefix $(obj),$(COBJS-y))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-
-clean:
-	rm -f $(SOBJS) $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak $(obj).depend
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
 
 #########################################################################
 
diff --git a/board/taskit/stamp9G20/config.mk b/board/taskit/stamp9G20/config.mk
deleted file mode 100644
index ff2cfd1..0000000
--- a/board/taskit/stamp9G20/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x23f00000
diff --git a/board/taskit/stamp9G20/led.c b/board/taskit/stamp9G20/led.c
index dc6ac63..9180ac3 100644
--- a/board/taskit/stamp9G20/led.c
+++ b/board/taskit/stamp9G20/led.c
@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -23,13 +23,10 @@
  */
 
 #include <common.h>
-#include <asm/arch/at91sam9260.h>
-#include <asm/arch/at91_pmc.h>
+#include <asm/io.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
 
 void coloured_LED_init(void)
 {
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+	/* Clock is enabled in board_early_init_f() */
 }
diff --git a/board/taskit/stamp9G20/partition.c b/board/taskit/stamp9G20/partition.c
index 2629c67..8816de6 100644
--- a/board/taskit/stamp9G20/partition.c
+++ b/board/taskit/stamp9G20/partition.c
@@ -2,6 +2,10 @@
  * (C) Copyright 2008
  * Ulf Samuelsson <ulf@atmel.com>
  *
+ * (C) Copyright 2012
+ * Markus Hubig <mhubig@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
diff --git a/board/taskit/stamp9G20/stamp9G20.c b/board/taskit/stamp9G20/stamp9G20.c
index b2c5d16..639db5d 100644
--- a/board/taskit/stamp9G20/stamp9G20.c
+++ b/board/taskit/stamp9G20/stamp9G20.c
@@ -1,11 +1,15 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * Achim Ehrlich <aehrlich@taskit.de>
  * taskit GmbH <www.taskit.de>
  *
+ * (C) Copyright 2012-
+ * Markus Hubig <mhubig@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -26,17 +30,16 @@
  */
 
 #include <common.h>
-#include <asm/arch/at91sam9260.h>
+#include <asm/io.h>
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
+
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-#include <net.h>
+# include <net.h>
 #endif
 #include <netdev.h>
 
@@ -50,51 +53,56 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_CMD_NAND
 static void stamp9G20_nand_hw_init(void)
 {
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
 	unsigned long csa;
 
-	/* Enable CS3 */
-	csa = at91_sys_read(AT91_MATRIX_EBICSA);
-	at91_sys_write(AT91_MATRIX_EBICSA,
-		       csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+	/* Assign CS3 to NAND/SmartMedia Interface */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+	writel(csa, &matrix->ebicsa);
 
 	/* Configure SMC CS3 for NAND/SmartMedia */
-	at91_sys_write(AT91_SMC_SETUP(3),
-		       AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(3),
-		       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-		       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-	at91_sys_write(AT91_SMC_CYCLE(3),
-		       AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-	at91_sys_write(AT91_SMC_MODE(3),
-		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-		       AT91_SMC_EXNWMODE_DISABLE |
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[3].setup);
+	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+		&smc->cs[3].pulse);
+	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+		&smc->cs[3].cycle);
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-		       AT91_SMC_DBW_16 |
+		AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-		       AT91_SMC_DBW_8 |
+		AT91_SMC_MODE_DBW_8 |
 #endif
-		       AT91_SMC_TDF_(2));
-
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+		AT91_SMC_MODE_TDF_CYCLE(2),
+		&smc->cs[3].mode);
 
 	/* Configure RDY/BSY */
 	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
 	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+
 }
 #endif
 
 #ifdef CONFIG_MACB
 static void stamp9G20_macb_hw_init(void)
 {
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
+	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+	unsigned long erstl;
 
 	/* Enable MACB Chip, this is the enable PIN on Stamp Adaptor*/
 	at91_set_gpio_output(AT91_PIN_PA26,0);
-
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+	
+	/* Enable EMAC clock */
+	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
 
 	/*
 	 * Disable pull-up on:
@@ -108,39 +116,53 @@ static void stamp9G20_macb_hw_init(void)
 	 * PHY has internal pull-down
 	 */
 	writel(pin_to_mask(AT91_PIN_PA14) |
-	       pin_to_mask(AT91_PIN_PA15) |
-	       pin_to_mask(AT91_PIN_PA17) |
-	       pin_to_mask(AT91_PIN_PA18) |
-	       pin_to_mask(AT91_PIN_PA28),
-	       pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
+		pin_to_mask(AT91_PIN_PA15) |
+		pin_to_mask(AT91_PIN_PA17) |
+		pin_to_mask(AT91_PIN_PA18) |
+		pin_to_mask(AT91_PIN_PA28),
+		&pioa->pudr);
+
+	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
 
 	/* Need to reset PHY -> 500ms reset */
-	at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-				     (AT91_RSTC_ERSTL & (0x0D << 8)) |
-				     AT91_RSTC_URSTEN);
+	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
+		AT91_RSTC_MR_URSTEN, &rstc->mr);
 
-	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
+	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
 
 	/* Wait for end hardware reset */
-	while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
+	while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
+		;
 
 	/* Restore NRST value */
-	at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-				     (AT91_RSTC_ERSTL & (0x0 << 8)) |
-				     AT91_RSTC_URSTEN);
+	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
+		&rstc->mr);
 
 	/* Re-enable pull-up */
 	writel(pin_to_mask(AT91_PIN_PA14) |
-	       pin_to_mask(AT91_PIN_PA15) |
-	       pin_to_mask(AT91_PIN_PA17) |
-	       pin_to_mask(AT91_PIN_PA18) |
-	       pin_to_mask(AT91_PIN_PA28),
-	       pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
+		pin_to_mask(AT91_PIN_PA15) |
+		pin_to_mask(AT91_PIN_PA17) |
+		pin_to_mask(AT91_PIN_PA18) |
+		pin_to_mask(AT91_PIN_PA28),
+		&pioa->puer);
 
+	/* Initialize EMAC=MACB hardware */
 	at91_macb_hw_init();
 }
 #endif
 
+int board_early_init_f(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	/* Enable clocks for all PIOs */
+	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+		(1 << ATMEL_ID_PIOC),
+		&pmc->pcer);
+
+	return 0;
+}
+
 int board_init(void)
 {
 	/* Enable Ctrlc */
@@ -151,14 +173,13 @@ int board_init(void)
 #else
 	gd->bd->bi_arch_number = MACH_TYPE_STAMP9G20;
 #endif
-
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
 	at91_set_gpio_output(AT91_PIN_PC9, 1);
 	at91_set_gpio_output(AT91_PIN_PC5, 1);
 
-	at91_serial_hw_init();
+	at91_seriald_hw_init();
 #ifdef CONFIG_CMD_NAND
 	stamp9G20_nand_hw_init();
 #endif
@@ -174,8 +195,9 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	gd->ram_size = get_ram_size(
+		(void *)CONFIG_SYS_SDRAM_BASE,
+		CONFIG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
@@ -196,7 +218,7 @@ int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
 #endif
 	return rc;
 }
diff --git a/boards.cfg b/boards.cfg
index 09701f8..1b3167f 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -118,8 +118,8 @@ cpu9G20_nand_128M            arm         arm926ejs   cpu9260             eukrea
 pm9261                       arm         arm926ejs   pm9261              ronetix        at91        pm9261:AT91SAM9261
 pm9263                       arm         arm926ejs   pm9263              ronetix        at91        pm9263:AT91SAM9263
 pm9g45                       arm         arm926ejs   pm9g45              ronetix        at91        pm9g45:AT91SAM9G45
-portuxG20                    arm         arm926ejs   stamp9G20           taskit         at91
-stamp9G20                    arm         arm926ejs   stamp9G20           taskit         at91
+stamp9G20                    arm         arm926ejs   stamp9G20           taskit         at91        stamp9G20:AT91SAM9G20
+portuxG20                    arm         arm926ejs   stamp9G20           taskit         at91        stamp9G20:AT91SAM9G20,CONFIG_PORTUXG20 
 cam_enc_4xx                  arm         arm926ejs   cam_enc_4xx         ait            davinci     cam_enc_4xx
 da830evm                     arm         arm926ejs   da8xxevm            davinci        davinci
 da850_am18xxevm              arm         arm926ejs   da8xxevm            davinci        davinci     da850evm:DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50
diff --git a/include/configs/stamp9G20.h b/include/configs/stamp9G20.h
index 3e255ed..c79ec5b 100644
--- a/include/configs/stamp9G20.h
+++ b/include/configs/stamp9G20.h
@@ -1,10 +1,16 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
- * (C) Achim Ehrlich <aehrlich@taskit.de>
+ *
+ * (C) Copyright 2010
+ * Achim Ehrlich <aehrlich@taskit.de>
  * taskit GmbH <www.taskit.de>
  *
+ * (C) Copyright 2012
+ * Markus Hubig <mhubig@imko.de>
+ * IMKO GmbH <www.imko.de>
+ *
  * Configuation settings for the Stamp9G20 CPU module.
  *
  * See file CREDITS for list of people who contributed to this
@@ -29,41 +35,58 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ		1000		/* 1ms resolution */
-
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
-#define AT91_CPU_NAME		"AT91SAM9G20"
-#define CONFIG_AT91SAM9G20	1	/* It's an Atmel AT91SAM9G20 SoC*/
-#define CONFIG_ARCH_CPU_INIT
-#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+#define CONFIG_SYS_TEXT_BASE		0x23f00000
 
-#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG	1
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
+#define CONFIG_SYS_HZ				1000		/* 1ms resolution */
 
+/* Misc CPU related */
+#define CONFIG_ARCH_CPU_INIT
+#undef	CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_SKIP_RELOCATE_UBOOT
 
-/* pad the watchdog */
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
 
+/* pad the watchdog */
 #define CONFIG_AT91SAM9_WATCHDOG
 #define CONFIG_HW_WATCHDOG
 
-
-/*
- * Hardware drivers
- */
-#define CONFIG_ATMEL_USART	1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define	CONFIG_USART_ID			ATMEL_ID_SYS
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
+#undef	CONFIG_USART0
+#undef	CONFIG_USART1
+#undef	CONFIG_USART2
 #define CONFIG_USART3		1	/* USART 3 is DBGU */
 
-/* LED */
 
+/* LED */
 #undef CONFIG_AT91_LED
 
 
@@ -85,6 +108,7 @@
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_IMI
 #undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_SOURCE
 
 #define CONFIG_CMD_PING		1
@@ -92,11 +116,21 @@
 #define CONFIG_CMD_NAND		1
 #define CONFIG_CMD_USB		1
 
-
-/* SDRAM */
+/*
+ * SDRAM: 1 bank, min 32, max 128 MB
+ * Initialized before u-boot gets started.
+ */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE		0x04000000 /* 64 megs */
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above
+ * that address while providing maximum stack area below.
+ */
+# define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
 #undef CONFIG_ATMEL_DATAFLASH_SPI
@@ -106,72 +140,66 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
-#define CONFIG_SYS_MAX_NAND_DEVICE		1
-#define CONFIG_SYS_NAND_BASE			0x40000000
-#define CONFIG_SYS_NAND_DBW_8			1
-/* our ALE is AD21 */
-#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
-/* our CLE is AD22 */
-#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC13
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
+#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
 #define CONFIG_SYS_64BIT_VSPRINTF		/* needed for nand_util.c */
 #endif
 
 /* NOR flash - no real flash on this board */
-#define CONFIG_SYS_NO_FLASH		1
+#define CONFIG_SYS_NO_FLASH			1
 
 /* Ethernet */
-#define CONFIG_MACB			1
-#define CONFIG_RMII			1
+#define CONFIG_MACB				1
+#define CONFIG_RMII				1
 #define CONFIG_NET_MULTI		1
-#define CONFIG_NET_RETRY_COUNT		20
+#define CONFIG_NET_RETRY_COUNT	20
 #define CONFIG_RESET_PHY_R		1
 
 /* USB */
 #define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW		1
-#define CONFIG_DOS_PARTITION		1
+#define CONFIG_USB_OHCI_NEW					1
+#define CONFIG_DOS_PARTITION				1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1
 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9260_UHP_BASE */
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
-#define CONFIG_USB_STORAGE		1
-#define CONFIG_CMD_FAT			1
+#define CONFIG_USB_STORAGE					1
+#define CONFIG_CMD_FAT						1
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
 
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
-#define CONFIG_ENV_OFFSET		0x60000
+#define CONFIG_ENV_IS_IN_NAND		1
+#define CONFIG_ENV_OFFSET			0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
-#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND	"run sdboot"
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
+#define CONFIG_ENV_SIZE				0x20000	/* 1 sector = 128 kB */
+#define CONFIG_BOOTCOMMAND			"run sdboot"
+#define	CONFIG_EXTRA_ENV_SETTINGS							\
 	"mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro,"		\
-				"256k(uboot)ro,128k(env1)ro,"		\
-				"128k(env2)ro,2M(linux),-(root)rw\0" 	\
+		"256k(uboot)ro,128k(env1)ro,"						\
+		"128k(env2)ro,2M(linux),-(root)rw\0" 				\
 	"sdboot=setenv bootargs ${basicargs} ${mtdparts} "		\
-		"root=/dev/mmcblk0p1 rootdelay=1; "			\
-		"nand read 0x22000000 0xA0000 0x200000; "		\
-		"bootm 22000000\0"					\
-	"flashboot=setenv bootargs ${basicargs} ${mtdparts} "		\
-		"root=/dev/mtdblock5 rootfstype=jffs2; "		\
-		"nand read 0x22000000 0xA0000 0x200000; "		\
-		"bootm 22000000\0"					\
-	"basicargs=console=ttyS0,115200 mem=64M\0"			\
+		"root=/dev/mmcblk0p1 rootdelay=1; "					\
+		"nand read 0x22000000 0xA0000 0x200000; "			\
+		"bootm 22000000\0"									\
+	"flashboot=setenv bootargs ${basicargs} ${mtdparts} "	\
+		"root=/dev/mtdblock5 rootfstype=jffs2; "			\
+		"nand read 0x22000000 0xA0000 0x200000; "			\
+		"bootm 22000000\0"									\
+	"basicargs=console=ttyS0,115200 mem=64M\0"				\
 	""
 
 
-
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
-
 #define CONFIG_SYS_PROMPT		"U-Boot> "
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
-- 
1.7.9.5

