i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8.
When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL.
When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull.
For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it.
Signed-off-by: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- drivers/misc/mxc_ocotp.c | 52 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 46 insertions(+), 6 deletions(-)
diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c index 38344e8..474971e 100644 --- a/drivers/misc/mxc_ocotp.c +++ b/drivers/misc/mxc_ocotp.c @@ -18,6 +18,7 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> +#include <asm/imx-common/sys_proto.h>
#define BO_CTRL_WR_UNLOCK 16 #define BM_CTRL_WR_UNLOCK 0xffff0000 @@ -61,6 +62,8 @@ #define FUSE_BANK_SIZE 0x80 #ifdef CONFIG_MX6SL #define FUSE_BANKS 8 +#elif defined(CONFIG_MX6ULL) +#define FUSE_BANKS 9 #else #define FUSE_BANKS 16 #endif @@ -72,11 +75,11 @@ #endif
#if defined(CONFIG_MX6) -#include <asm/arch/sys_proto.h>
/* * There is a hole in shadow registers address map of size 0x100 - * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. + * between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX, + * iMX6UL and i.MX6ULL. * Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, * we should account for this hole in address space. * @@ -97,7 +100,10 @@ u32 fuse_bank_physical(int index)
if (is_mx6sl()) { phy_index = index; - } else if (is_mx6ul()) { + } else if (is_mx6ul() || is_mx6ull()) { + if (is_mx6ull() && index == 8) + index = 7; + if (index >= 6) phy_index = fuse_bank_physical(5) + (index - 6) + 3; else @@ -112,11 +118,27 @@ u32 fuse_bank_physical(int index) } return phy_index; } + +u32 fuse_word_physical(u32 bank, u32 word_index) +{ + if (is_mx6ull()) { + if (bank == 8) + word_index = word_index + 4; + } + + return word_index; +} #else u32 fuse_bank_physical(int index) { return index; } + +u32 fuse_word_physical(u32 bank, u32 word_index) +{ + return word_index; +} + #endif
static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us) @@ -142,6 +164,14 @@ static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, return -EINVAL; }
+ if (is_mx6ull()) { + if ((bank == 7 || bank == 8) && + word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) { + printf("mxc_ocotp %s(): Invalid argument on 6ULL\n", caller); + return -EINVAL; + } + } + enable_ocotp_clk(1);
wait_busy(*regs, 1); @@ -176,14 +206,16 @@ int fuse_read(u32 bank, u32 word, u32 *val) struct ocotp_regs *regs; int ret; u32 phy_bank; + u32 phy_word;
ret = prepare_read(®s, bank, word, val, __func__); if (ret) return ret;
phy_bank = fuse_bank_physical(bank); + phy_word = fuse_word_physical(bank, word);
- *val = readl(®s->bank[phy_bank].fuse_regs[word << 2]); + *val = readl(®s->bank[phy_bank].fuse_regs[phy_word << 2]);
return finish_access(regs, __func__); } @@ -237,7 +269,13 @@ static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word, #ifdef CONFIG_MX7 u32 addr = bank; #else - u32 addr = bank << 3 | word; + u32 addr; + /* Bank 7 and Bank 8 only supports 4 words each for i.MX6ULL */ + if ((is_mx6ull()) && (bank > 7)) { + bank = bank - 1; + word += 4; + } + addr = bank << 3 | word; #endif
set_timing(regs); @@ -325,14 +363,16 @@ int fuse_override(u32 bank, u32 word, u32 val) struct ocotp_regs *regs; int ret; u32 phy_bank; + u32 phy_word;
ret = prepare_write(®s, bank, word, __func__); if (ret) return ret;
phy_bank = fuse_bank_physical(bank); + phy_word = fuse_word_physical(bank, word);
- writel(val, ®s->bank[phy_bank].fuse_regs[word << 2]); + writel(val, ®s->bank[phy_bank].fuse_regs[phy_word << 2]);
return finish_access(regs, __func__); }